Jonas Paulsson e554dc2124 [SystemZ] Don't use libcall for 128 bit shifts. ...

Expand 128 bit shifts instead of using a libcall.

This patch removes the 128 bit shift libcalls and thereby causes
ExpandShiftWithUnknownAmountBit() to be called.

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D101993

2021-05-06 18:14:41 +02:00

..

AArch64

GlobalISel: Use DAG call lowering infrastructure in a more compatible way

2021-05-05 17:35:02 -04:00

AMDGPU

[AMDGPU] Fix WQM failure with single block inactive demote

2021-05-06 21:02:26 +09:00

ARC

…

ARM

GlobalISel: Use DAG call lowering infrastructure in a more compatible way

2021-05-05 17:35:02 -04:00

AVR

[AVR] Fix lifeness issues in the AVR backend

2021-03-04 14:04:39 +01:00

BPF

[BPF][Test] Disable codegen test on AIX

2021-05-06 02:38:46 +00:00

Generic

Recommit "[VP,Integer,#2] ExpandVectorPredication pass"

2021-05-04 11:47:52 +02:00

Hexagon

[Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx

2021-05-04 11:00:01 -07:00

Inputs

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Lanai

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M68k

[M68k][AsmParser] Fix invalid register name parsing logics

2021-05-05 17:13:02 -07:00

Mips

[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics

2021-05-06 04:01:20 +01:00

MIR

[AMDGPU] Set implicit arg attributes for indirect calls

2021-04-13 13:15:13 +00:00

MSP430

OpaquePtr: Bulk update tests to use typed sret

2020-11-20 17:58:26 -05:00

NVPTX

[NVPTX] Enable lowering of atomics on local memory

2021-04-26 20:12:12 -04:00

PowerPC

[AIX][TLS] Add support for TLSGD relocations to XCOFF objects

2021-05-06 09:01:47 -05:00

RISCV

[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics

2021-05-06 04:01:20 +01:00

SPARC

[LegalizeTypes] Improve ExpandIntRes_XMULO codegen.

2021-03-01 09:54:32 -08:00

SystemZ

[SystemZ] Don't use libcall for 128 bit shifts.

2021-05-06 18:14:41 +02:00

Thumb

Support {S,U}REMEqFold before legalization

2021-04-01 01:35:41 +03:00

Thumb2

Revert "[ARM] Transforming memcpy to Tail predicated Loop"

2021-05-06 12:39:08 +01:00

VE

[test] Fix CodeGen/VE/Scalar tests

2021-03-02 15:30:44 -08:00

WebAssembly

[WebAssembly] Set alignment to 1 for SIMD memory intrinsics

2021-05-05 11:59:33 -07:00

WinCFGuard

[CFGuard] Add address-taken IAT tables and delay-load support

2020-11-17 18:24:45 -08:00

WinEH

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X86

X86/GlobalISel: Use generic version of splitToValueTypes

2021-05-05 17:35:02 -04:00

XCore

[CodeGen] Report a normal instead of fatal error for label redefinition

2021-03-09 10:54:41 +00:00