llvm-mirror/docs/AMDGPU/gfx7_vdata32_0.rst
Dmitry Preobrazhensky ce9abb7e3a [AMDGPU][MC][DOC] Updated AMD GPU assembler description
Stage 2: added detailed description of operands

See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572

llvm-svn: 349368
2018-12-17 17:38:11 +00:00

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.. _amdgpu_synid7_vdata32_0:
vdata
===========================
Instruction input.
*Size:* 1 dword.
*Operands:* :ref:`v<amdgpu_synid_v>`