llvm-mirror/test/Transforms/CodeGenPrepare
Matt Arsenault 1789f18d3a BypassSlowDivision: Fix dropping debug info
I don't know anything about debug info, but this seems like more work
should be necessary. This constructs a new IRBuilder and reconstructs
the original divides rather than moving the original.

One problem this has is if a div/rem pair are handled, both end up
with the same debugloc. I'm not sure how to fix this, since this uses
a cache when it sees the same input operands again, which will have
the first instance's location attached.
2020-06-18 17:27:19 -04:00
..
AArch64 Recommit "[PatternMatch] Match XOR variant of unsigned-add overflow check." 2020-02-23 18:33:18 +00:00
AMDGPU BypassSlowDivision: Fix dropping debug info 2020-06-18 17:27:19 -04:00
ARM [ARM] Replace arm vendor with none. NFC 2020-04-22 18:19:35 +01:00
Mips Revert "Temporarily Revert "Add basic loop fusion pass."" 2019-04-17 04:52:47 +00:00
NVPTX Revert "Temporarily Revert "Add basic loop fusion pass."" 2019-04-17 04:52:47 +00:00
PowerPC [CodeGen] Fix the computation of the alignment of split stores. 2020-02-12 10:37:30 +01:00
SPARC [TargetLower] Update shouldFormOverflowOp check if math is used. 2020-02-19 11:28:33 +01:00
X86 [CGP] Reset the debug location when promoting zext(s). 2020-06-17 11:13:13 -07:00
dom-tree.ll [CodeGenPrepare][test] Add REQUIRES to two tests after D73754 2020-02-02 09:53:17 -08:00
sink-shift-and-trunc.ll [CodeGenPrepare] Fix use-after-free 2019-08-16 23:10:34 +00:00
skip-merging-case-block.ll [CodeGenPrepare][test] Add REQUIRES to two tests after D73754 2020-02-02 09:53:17 -08:00