llvm-mirror/test/CodeGen/AArch64/arm64-2011-04-21-CPSRBug.ll
David Blaikie ab043ff680 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

llvm-svn: 230794
2015-02-27 21:17:42 +00:00

27 lines
783 B
LLVM

; RUN: llc < %s -mtriple=arm64-apple-iOS5.0
; CPSR is not allocatable so fast allocatable wouldn't mark them killed.
; rdar://9313272
define hidden void @t() nounwind {
entry:
%cmp = icmp eq i32* null, undef
%frombool = zext i1 %cmp to i8
store i8 %frombool, i8* undef, align 1
%tmp4 = load i8, i8* undef, align 1
%tobool = trunc i8 %tmp4 to i1
br i1 %tobool, label %land.lhs.true, label %if.end
land.lhs.true: ; preds = %entry
unreachable
if.end: ; preds = %entry
br i1 undef, label %land.lhs.true14, label %if.end33
land.lhs.true14: ; preds = %if.end
unreachable
if.end33: ; preds = %if.end
unreachable
}