llvm-mirror/test/CodeGen/AArch64/arm64-sitofp-combine-chains.ll
Simon Pilgrim 91bb437eb8 [AARCH64] Enable AARCH64 lit tests on windows dev machines
As discussed on PR27654, this patch fixes the triples of a lot of aarch64 tests and enables lit tests on windows

This will hopefully help stop cases where windows developers break the aarch64 target

Differential Revision: https://reviews.llvm.org/D22191

llvm-svn: 275973
2016-07-19 13:35:11 +00:00

23 lines
690 B
LLVM

; RUN: llc < %s -mtriple=arm64-eabi | FileCheck %s
; ARM64ISelLowering.cpp was creating a new (floating-point) load for efficiency
; but not updating chain-successors of the old one. As a result, the two memory
; operations in this function both ended up direct successors to the EntryToken
; and could be reordered.
@var = global i32 0, align 4
define float @foo() {
; CHECK-LABEL: foo:
; Load must come before we clobber @var
; CHECK: adrp x[[VARBASE:[0-9]+]], {{_?var}}
; CHECK: ldr [[SREG:s[0-9]+]], [x[[VARBASE]],
; CHECK: str wzr, [x[[VARBASE]],
%val = load i32, i32* @var, align 4
store i32 0, i32* @var, align 4
%fltval = sitofp i32 %val to float
ret float %fltval
}