llvm-mirror/test/CodeGen/AArch64/fast-regalloc-empty-bb-with-liveins.mir
Puyan Lotfi d4c615be8c Followup on Proposal to move MIR physical register namespace to '$' sigil.
Discussed here:

http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html

In preparation for adding support for named vregs we are changing the sigil for
physical registers in MIR to '$' from '%'. This will prevent name clashes of
named physical register with named vregs.

llvm-svn: 323922
2018-01-31 22:04:26 +00:00

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64-apple-ios -run-pass regallocfast -o - %s | FileCheck %s
# This test used to crash the fast register alloc.
# Basically, when a basic block has liveins, the fast regalloc
# was deferencing the begin iterator of this block. However,
# when this block is empty and it will just crashed!
---
name: crashing
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: crashing
; CHECK: bb.0:
; CHECK: successors: %bb.1(0x80000000)
; CHECK: liveins: $x0, $x1
; CHECK: bb.1:
; CHECK: renamable $w0 = MOVi32imm -1
; CHECK: RET_ReallyLR implicit killed $w0
bb.1:
liveins: $x0, $x1
bb.2:
%0:gpr32 = MOVi32imm -1
$w0 = COPY %0
RET_ReallyLR implicit $w0
...