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This is a follow up of the AArch64 FP16 intrinsics work; the codegen tests had not been added yet. Differential Revision: https://reviews.llvm.org/D44510 llvm-svn: 327624
43 lines
1.3 KiB
LLVM
43 lines
1.3 KiB
LLVM
; RUN: llc < %s -mtriple=aarch64-eabi -mattr=+v8.2a,+fullfp16 | FileCheck %s
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declare <4 x half> @llvm.nearbyint.v4f16(<4 x half>)
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declare <8 x half> @llvm.nearbyint.v8f16(<8 x half>)
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declare <4 x half> @llvm.sqrt.v4f16(<4 x half>)
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declare <8 x half> @llvm.sqrt.v8f16(<8 x half>)
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define dso_local <4 x half> @t_vrndi_f16(<4 x half> %a) {
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; CHECK-LABEL: t_vrndi_f16:
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; CHECK: frinti v0.4h, v0.4h
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; CHECK-NEXT: ret
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entry:
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%vrndi1.i = tail call <4 x half> @llvm.nearbyint.v4f16(<4 x half> %a)
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ret <4 x half> %vrndi1.i
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}
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define dso_local <8 x half> @t_vrndiq_f16(<8 x half> %a) {
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; CHECK-LABEL: t_vrndiq_f16:
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; CHECK: frinti v0.8h, v0.8h
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; CHECK-NEXT: ret
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entry:
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%vrndi1.i = tail call <8 x half> @llvm.nearbyint.v8f16(<8 x half> %a)
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ret <8 x half> %vrndi1.i
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}
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define dso_local <4 x half> @t_vsqrt_f16(<4 x half> %a) {
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; CHECK-LABEL: t_vsqrt_f16:
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; CHECK: fsqrt v0.4h, v0.4h
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; CHECK-NEXT: ret
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entry:
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%vsqrt.i = tail call <4 x half> @llvm.sqrt.v4f16(<4 x half> %a)
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ret <4 x half> %vsqrt.i
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}
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define dso_local <8 x half> @t_vsqrtq_f16(<8 x half> %a) {
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; CHECK-LABEL: t_vsqrtq_f16:
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; CHECK: fsqrt v0.8h, v0.8h
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; CHECK-NEXT: ret
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entry:
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%vsqrt.i = tail call <8 x half> @llvm.sqrt.v8f16(<8 x half> %a)
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ret <8 x half> %vsqrt.i
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}
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