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e2a4194fea
This makes easier to identify changes in the instruction info flags. It also helps spotting potential regressions similar to the one recently introduced at r336728. Using the same character to mark MayLoad/MayStore/HasSideEffects is problematic for llvm-lit. When pattern matching substrings, llvm-lit consumes tabs and spaces. A change in position of the flag marker may not trigger a test failure. This patch only changes the character used for flag `hasSideEffects`. The reason why I didn't touch other flags is because I want to avoid spamming the mailing because of the massive diff due to the numerous tests affected by this change. In future, each instruction flag should be associated with a different character in the Instruction Info View. llvm-svn: 336797
92 lines
3.0 KiB
C++
92 lines
3.0 KiB
C++
//===--------------------- InstructionInfoView.cpp --------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// This file implements the InstructionInfoView API.
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///
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//===----------------------------------------------------------------------===//
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#include "InstructionInfoView.h"
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namespace mca {
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using namespace llvm;
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void InstructionInfoView::printView(raw_ostream &OS) const {
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std::string Buffer;
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raw_string_ostream TempStream(Buffer);
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const MCSchedModel &SM = STI.getSchedModel();
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unsigned Instructions = Source.size();
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std::string Instruction;
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raw_string_ostream InstrStream(Instruction);
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TempStream << "\n\nInstruction Info:\n";
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TempStream << "[1]: #uOps\n[2]: Latency\n[3]: RThroughput\n"
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<< "[4]: MayLoad\n[5]: MayStore\n[6]: HasSideEffects (U)\n\n";
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TempStream << "[1] [2] [3] [4] [5] [6] Instructions:\n";
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for (unsigned I = 0, E = Instructions; I < E; ++I) {
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const MCInst &Inst = Source.getMCInstFromIndex(I);
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const MCInstrDesc &MCDesc = MCII.get(Inst.getOpcode());
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// Obtain the scheduling class information from the instruction.
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unsigned SchedClassID = MCDesc.getSchedClass();
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unsigned CPUID = SM.getProcessorID();
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// Try to solve variant scheduling classes.
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while (SchedClassID && SM.getSchedClassDesc(SchedClassID)->isVariant())
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SchedClassID = STI.resolveVariantSchedClass(SchedClassID, &Inst, CPUID);
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const MCSchedClassDesc &SCDesc = *SM.getSchedClassDesc(SchedClassID);
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unsigned NumMicroOpcodes = SCDesc.NumMicroOps;
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unsigned Latency = MCSchedModel::computeInstrLatency(STI, SCDesc);
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Optional<double> RThroughput =
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MCSchedModel::getReciprocalThroughput(STI, SCDesc);
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TempStream << ' ' << NumMicroOpcodes << " ";
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if (NumMicroOpcodes < 10)
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TempStream << " ";
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else if (NumMicroOpcodes < 100)
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TempStream << ' ';
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TempStream << Latency << " ";
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if (Latency < 10)
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TempStream << " ";
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else if (Latency < 100)
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TempStream << ' ';
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if (RThroughput.hasValue()) {
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double RT = RThroughput.getValue();
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TempStream << format("%.2f", RT) << ' ';
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if (RT < 10.0)
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TempStream << " ";
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else if (RT < 100.0)
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TempStream << ' ';
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} else {
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TempStream << " - ";
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}
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TempStream << (MCDesc.mayLoad() ? " * " : " ");
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TempStream << (MCDesc.mayStore() ? " * " : " ");
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TempStream << (MCDesc.hasUnmodeledSideEffects() ? " U " : " ");
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MCIP.printInst(&Inst, InstrStream, "", STI);
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InstrStream.flush();
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// Consume any tabs or spaces at the beginning of the string.
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StringRef Str(Instruction);
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Str = Str.ltrim();
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TempStream << " " << Str << '\n';
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Instruction = "";
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}
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TempStream.flush();
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OS << Buffer;
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}
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} // namespace mca.
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