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If the cmp is in a different basic block, then it is possible that not all operands of that compare have defined registers. This can happen when one of the operands to the cmp is a load and the load gets folded into the cmp. In this case FastISel will skip the load instruction and the vreg is never defined. llvm-svn: 211730
51 lines
1.1 KiB
LLVM
51 lines
1.1 KiB
LLVM
; RUN: llc < %s -O0 -mtriple=x86_64-apple-darwin10 | FileCheck %s
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; Test if we do not fold the cmp into select if the instructions are in
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; different basic blocks.
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define i32 @select_cmp_cmov_i32(i32 %a, i32 %b) {
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; CHECK-LABEL: select_cmp_cmov_i32
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; CHECK-LABEL: continue
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; CHECK-NOT: cmp
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%1 = icmp ult i32 %a, %b
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br i1 %1, label %continue, label %exit
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continue:
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%2 = select i1 %1, i32 %a, i32 %b
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ret i32 %2
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exit:
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ret i32 -1
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}
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define float @select_fcmp_oeq_f32(float %a, float %b, float %c, float %d) {
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; CHECK-LABEL: select_fcmp_oeq_f32
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; CHECK-LABEL: continue
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; CHECK-NOT: cmp
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%1 = fcmp oeq float %a, %b
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br i1 %1, label %continue, label %exit
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continue:
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%2 = select i1 %1, float %c, float %d
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ret float %2
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exit:
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ret float -1.0
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}
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define float @select_fcmp_one_f32(float %a, float %b, float %c, float %d) {
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; CHECK-LABEL: select_fcmp_one_f32
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; CHECK-LABEL: continue
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; CHECK-NOT: ucomi
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%1 = fcmp one float %a, %b
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br i1 %1, label %continue, label %exit
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continue:
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%2 = select i1 %1, float %c, float %d
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ret float %2
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exit:
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ret float -1.0
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}
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