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4331428e24
and %rcr_, leaving just %cr_ which is what people expect. Updated the disassembler to support this unified register set. Added a testcase to verify that the registers continue to be decoded correctly. llvm-svn: 103196 |
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arm-tests.txt | ||
dg.exp | ||
neon-tests.txt | ||
simple-tests.txt | ||
thumb-tests.txt |