llvm/test/CodeGen/SystemZ/atomic-store-02.ll

; Test 16-bit atomic stores.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s

define void @f1(i16 %val, i16 *%src) {
; CHECK-LABEL: f1:
; CHECK: sth %r2, 0(%r3)
; CHECK: bcr 1{{[45]}}, %r0
; CHECK: br %r14
  store atomic i16 %val, i16 *%src seq_cst, align 2
  ret void
}
[SystemZ] Add CodeGen test cases This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181204 91177308-0d34-0410-b5e6-96231b3b80d8 2013-05-06 16:17:29 +00:00			`; Test 16-bit atomic stores.`
			`;`
			`; RUN: llc < %s -mtriple=s390x-linux-gnu \| FileCheck %s`

			`define void @f1(i16 %val, i16 *%src) {`
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name ".ll" \| \ while read NAME; do echo "$NAME" if ! grep -q "^; RUN: llc.debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]@\([A-Za-z0-9_]\)(.$/\1/p" < $NAME \| \ while read FUNC; do sed -i '' "s/;\(.\)\([A-Za-z0-9_-]\):\( \)$FUNC: \$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8 2013-07-14 06:24:09 +00:00			`; CHECK-LABEL: f1:`
Add TargetLowering::prepareVolatileOrAtomicLoad One unusual feature of the z architecture is that the result of a previous load can be reused indefinitely for subsequent loads, even if a cache-coherent store to that location is performed by another CPU. A special serializing instruction must be used if you want to force a load to be reattempted. Since volatile loads are not supposed to be omitted in this way, we should insert a serializing instruction before each such load. The same goes for atomic loads. The patch implements this at the IR->DAG boundary, in a similar way to atomic fences. It is a no-op for targets other than SystemZ. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196906 91177308-0d34-0410-b5e6-96231b3b80d8 2013-12-10 10:49:34 +00:00			`; CHECK: sth %r2, 0(%r3)`
			`; CHECK: bcr 1{{[45]}}, %r0`
[SystemZ] Add CodeGen test cases This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181204 91177308-0d34-0410-b5e6-96231b3b80d8 2013-05-06 16:17:29 +00:00			`; CHECK: br %r14`
			`store atomic i16 %val, i16 *%src seq_cst, align 2`
			`ret void`
			`}`