llvm/test/CodeGen/Mips/micromips-rdhwr-directives.ll

; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=static < %s \
; RUN:   -mattr=+micromips | FileCheck %s

@a = external thread_local global i32

define i32 @foo() nounwind readonly {
entry:
; CHECK: .set  push
; CHECK: .set  mips32r2
; CHECK: rdhwr
; CHECK: .set  pop

  %0 = load i32, i32* @a, align 4
  ret i32 %0
}
[mips][microMIPS] Implement SDBBP and RDHWR instructions. Differential Revision: http://reviews.llvm.org/D5240 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222347 91177308-0d34-0410-b5e6-96231b3b80d8 2014-11-19 11:25:50 +00:00			`; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=static < %s \`
			`; RUN: -mattr=+micromips \| FileCheck %s`

			`@a = external thread_local global i32`

			`define i32 @foo() nounwind readonly {`
			`entry:`
			`; CHECK: .set push`
			`; CHECK: .set mips32r2`
			`; CHECK: rdhwr`
			`; CHECK: .set pop`

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=\|:\|^)\sload (?:atomic )?(?:volatile )?(.?))(\| addrspace\(\d+\) )\($\| (?:%\|@\|null\|undef\|blockaddress\|getelementptr\|addrspacecast\|bitcast\|inttoptr\|\[\[[a-zA-Z]\|\{\{).$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8 2015-02-27 21:17:42 +00:00			`%0 = load i32, i32* @a, align 4`
[mips][microMIPS] Implement SDBBP and RDHWR instructions. Differential Revision: http://reviews.llvm.org/D5240 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222347 91177308-0d34-0410-b5e6-96231b3b80d8 2014-11-19 11:25:50 +00:00			`ret i32 %0`
			`}`