llvm/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll

; RUN: llc -mcpu=generic -mtriple=x86_64-mingw32 < %s | FileCheck %s
; CHECK: subq    $40, %rsp
; CHECK: movaps  %xmm8, 16(%rsp)
; CHECK: movaps  %xmm7, (%rsp)

define i32 @a() nounwind {
entry:
        tail call void asm sideeffect "", "~{xmm7},~{xmm8},~{dirflag},~{fpsr},~{flags}"() nounwind
        ret i32 undef
}
Instruction scheduling itinerary for Intel Atom. Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT. Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches. Adds a test to verify that the scheduler is working. Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP. Patch by Preston Gurd! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149558 91177308-0d34-0410-b5e6-96231b3b80d8 2012-02-01 23:20:51 +00:00			`; RUN: llc -mcpu=generic -mtriple=x86_64-mingw32 < %s \| FileCheck %s`
[X86] Add intrinsics for reading and writing to the flags register LLVM's targets need to know if stack pointer adjustments occur after the prologue. This is needed to correctly determine if the red-zone is appropriate to use or if a frame pointer is required. Normally, LLVM can figure this out very precisely by reasoning about the contents of the MachineFunction. There is an interesting corner case: inline assembly. The vast majority of inline assembly which will perform a push or pop is done so to pair up with pushf or popf as appropriate. Unfortunately, this inline assembly doesn't mark the stack pointer as clobbered because, well, it isn't. The stack pointer is decremented and then immediately incremented. Because of this, LLVM was changed in r256456 to conservatively assume that inline assembly contain a sequence of stack operations. This is unfortunate because the vast majority of inline assembly will not end up manipulating the stack pointer in any way at all. Instead, let's provide a more principled solution: an intrinsic. FWIW, other compilers (MSVC and GCC among them) also provide this functionality as an intrinsic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256685 91177308-0d34-0410-b5e6-96231b3b80d8 2016-01-01 06:50:01 +00:00			`; CHECK: subq $40, %rsp`
			`; CHECK: movaps %xmm8, 16(%rsp)`
			`; CHECK: movaps %xmm7, (%rsp)`
PR3739, part 2: Use an explicit store to spill XMM registers. (Previously, the code tried to use "push", which doesn't exist for XMM registers.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72836 91177308-0d34-0410-b5e6-96231b3b80d8 2009-06-04 02:32:04 +00:00
			`define i32 @a() nounwind {`
			`entry:`
Target/X86: Tweak allocating shadow area (aka home) on Win64. It must be enough for caller to allocate one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124949 91177308-0d34-0410-b5e6-96231b3b80d8 2011-02-05 15:11:32 +00:00			`tail call void asm sideeffect "", "~{xmm7},~{xmm8},~{dirflag},~{fpsr},~{flags}"() nounwind`
			`ret i32 undef`
PR3739, part 2: Use an explicit store to spill XMM registers. (Previously, the code tried to use "push", which doesn't exist for XMM registers.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72836 91177308-0d34-0410-b5e6-96231b3b80d8 2009-06-04 02:32:04 +00:00			`}`