2002-11-22 22:44:32 +00:00
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//===-- RegAllocSimple.cpp - A simple generic register allocator --- ------===//
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//
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// This file implements a simple register allocator. *Very* simple.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Function.h"
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#include "llvm/iTerminators.h"
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#include "llvm/Type.h"
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#include "llvm/Constants.h"
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#include "llvm/Pass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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2002-12-04 23:58:08 +00:00
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#include "llvm/Target/MachineInstrInfo.h"
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2002-11-22 22:44:32 +00:00
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#include "llvm/Target/MRegisterInfo.h"
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#include "llvm/Target/MachineRegInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/InstVisitor.h"
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#include "Support/Statistic.h"
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#include <map>
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2002-12-13 09:54:36 +00:00
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//namespace {
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2002-11-22 22:44:32 +00:00
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struct RegAllocSimple : public FunctionPass {
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TargetMachine &TM;
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MachineBasicBlock *CurrMBB;
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MachineFunction *MF;
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unsigned maxOffset;
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const MRegisterInfo *RegInfo;
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unsigned NumBytesAllocated, ByteAlignment;
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// Maps SSA Regs => offsets on the stack where these values are stored
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2002-12-04 19:24:45 +00:00
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// FIXME: change name to VirtReg2OffsetMap
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std::map<unsigned, unsigned> RegMap;
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2002-11-22 22:44:32 +00:00
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// Maps SSA Regs => physical regs
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std::map<unsigned, unsigned> SSA2PhysRegMap;
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2002-12-03 23:15:19 +00:00
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// Maps physical register to their register classes
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std::map<unsigned, const TargetRegisterClass*> PhysReg2RegClassMap;
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2002-12-12 23:20:31 +00:00
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// Made to combat the incorrect allocation of r2 = add r1, r1
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std::map<unsigned, unsigned> VirtReg2PhysRegMap;
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2002-11-22 22:44:32 +00:00
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// Maps RegClass => which index we can take a register from. Since this is a
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// simple register allocator, when we need a register of a certain class, we
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// just take the next available one.
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std::map<unsigned, unsigned> RegsUsed;
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std::map<const TargetRegisterClass*, unsigned> RegClassIdx;
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RegAllocSimple(TargetMachine &tm) : TM(tm), CurrMBB(0), maxOffset(0),
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RegInfo(tm.getRegisterInfo()),
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2002-12-13 04:34:02 +00:00
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ByteAlignment(4)
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2002-11-22 22:44:32 +00:00
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{
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2002-12-03 23:15:19 +00:00
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// build reverse mapping for physReg -> register class
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RegInfo->buildReg2RegClassMap(PhysReg2RegClassMap);
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2002-11-22 22:44:32 +00:00
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RegsUsed[RegInfo->getFramePointer()] = 1;
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RegsUsed[RegInfo->getStackPointer()] = 1;
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2002-12-13 04:34:02 +00:00
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cleanupAfterFunction();
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2002-11-22 22:44:32 +00:00
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}
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bool isAvailableReg(unsigned Reg) {
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// assert(Reg < MRegisterInfo::FirstVirtualReg && "...");
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return RegsUsed.find(Reg) == RegsUsed.end();
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}
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2002-12-02 21:11:58 +00:00
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///
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unsigned allocateStackSpaceFor(unsigned VirtReg,
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const TargetRegisterClass *regClass);
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2002-11-22 22:44:32 +00:00
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/// Given size (in bytes), returns a register that is currently unused
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/// Side effect: marks that register as being used until manually cleared
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unsigned getFreeReg(unsigned virtualReg);
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/// Returns all `borrowed' registers back to the free pool
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void clearAllRegs() {
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RegClassIdx.clear();
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}
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2002-12-04 23:58:08 +00:00
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void cleanupAfterFunction() {
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RegMap.clear();
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SSA2PhysRegMap.clear();
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2002-12-13 09:54:36 +00:00
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NumBytesAllocated = ByteAlignment;
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2002-12-04 23:58:08 +00:00
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}
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2002-11-22 22:44:32 +00:00
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/// Moves value from memory into that register
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MachineBasicBlock::iterator
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2002-12-13 09:54:36 +00:00
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moveUseToReg (MachineBasicBlock *MBB,
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MachineBasicBlock::iterator I, unsigned VirtReg,
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2002-11-22 22:44:32 +00:00
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unsigned &PhysReg);
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/// Saves reg value on the stack (maps virtual register to stack value)
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MachineBasicBlock::iterator
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2002-12-13 09:54:36 +00:00
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saveVirtRegToStack (MachineBasicBlock *MBB,
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MachineBasicBlock::iterator I, unsigned VirtReg,
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2002-12-03 23:15:19 +00:00
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unsigned PhysReg);
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MachineBasicBlock::iterator
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2002-12-13 09:54:36 +00:00
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savePhysRegToStack (MachineBasicBlock *MBB,
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MachineBasicBlock::iterator I, unsigned PhysReg);
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2002-11-22 22:44:32 +00:00
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/// runOnFunction - Top level implementation of instruction selection for
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/// the entire function.
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///
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bool runOnMachineFunction(MachineFunction &Fn);
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bool runOnFunction(Function &Fn) {
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return runOnMachineFunction(MachineFunction::get(&Fn));
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}
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};
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2002-12-13 09:54:36 +00:00
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//}
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2002-11-22 22:44:32 +00:00
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2002-12-02 21:11:58 +00:00
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unsigned RegAllocSimple::allocateStackSpaceFor(unsigned VirtReg,
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const TargetRegisterClass *regClass)
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{
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if (RegMap.find(VirtReg) == RegMap.end()) {
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2002-12-13 04:34:02 +00:00
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#if 0
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2002-12-02 21:11:58 +00:00
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unsigned size = regClass->getDataSize();
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unsigned over = NumBytesAllocated - (NumBytesAllocated % ByteAlignment);
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if (size >= ByteAlignment - over) {
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// need to pad by (ByteAlignment - over)
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NumBytesAllocated += ByteAlignment - over;
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}
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RegMap[VirtReg] = NumBytesAllocated;
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NumBytesAllocated += size;
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2002-12-13 04:34:02 +00:00
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#endif
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// FIXME: forcing each arg to take 4 bytes on the stack
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RegMap[VirtReg] = NumBytesAllocated;
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2002-12-13 09:54:36 +00:00
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NumBytesAllocated += ByteAlignment;
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2002-12-02 21:11:58 +00:00
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}
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return RegMap[VirtReg];
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}
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2002-11-22 22:44:32 +00:00
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unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
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const TargetRegisterClass* regClass = MF->getRegClass(virtualReg);
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unsigned physReg;
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assert(regClass);
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if (RegClassIdx.find(regClass) != RegClassIdx.end()) {
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unsigned regIdx = RegClassIdx[regClass]++;
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assert(regIdx < regClass->getNumRegs() && "Not enough registers!");
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physReg = regClass->getRegister(regIdx);
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} else {
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physReg = regClass->getRegister(0);
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// assert(physReg < regClass->getNumRegs() && "No registers in class!");
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RegClassIdx[regClass] = 1;
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}
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if (isAvailableReg(physReg))
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return physReg;
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else {
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return getFreeReg(virtualReg);
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}
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}
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MachineBasicBlock::iterator
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2002-12-13 09:54:36 +00:00
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RegAllocSimple::moveUseToReg (MachineBasicBlock *MBB,
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MachineBasicBlock::iterator I,
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2002-11-22 22:44:32 +00:00
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unsigned VirtReg, unsigned &PhysReg)
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{
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const TargetRegisterClass* regClass = MF->getRegClass(VirtReg);
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assert(regClass);
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2002-12-02 21:11:58 +00:00
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unsigned stackOffset = allocateStackSpaceFor(VirtReg, regClass);
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2002-11-22 22:44:32 +00:00
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PhysReg = getFreeReg(VirtReg);
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2002-12-02 21:11:58 +00:00
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// Add move instruction(s)
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2002-12-13 09:54:36 +00:00
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return RegInfo->loadRegOffset2Reg(MBB, I, PhysReg,
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2002-12-02 21:11:58 +00:00
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RegInfo->getFramePointer(),
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2002-12-04 23:58:08 +00:00
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-stackOffset, regClass->getDataSize());
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2002-11-22 22:44:32 +00:00
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}
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MachineBasicBlock::iterator
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2002-12-13 09:54:36 +00:00
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RegAllocSimple::saveVirtRegToStack (MachineBasicBlock *MBB,
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MachineBasicBlock::iterator I,
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2002-12-03 23:15:19 +00:00
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unsigned VirtReg, unsigned PhysReg)
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2002-11-22 22:44:32 +00:00
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{
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const TargetRegisterClass* regClass = MF->getRegClass(VirtReg);
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assert(regClass);
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2002-12-04 23:58:08 +00:00
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unsigned stackOffset = allocateStackSpaceFor(VirtReg, regClass);
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2002-12-02 21:11:58 +00:00
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2002-11-22 22:44:32 +00:00
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// Add move instruction(s)
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2002-12-13 09:54:36 +00:00
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return RegInfo->storeReg2RegOffset(MBB, I, PhysReg,
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2002-11-22 22:44:32 +00:00
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RegInfo->getFramePointer(),
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2002-12-04 23:58:08 +00:00
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-stackOffset, regClass->getDataSize());
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2002-11-22 22:44:32 +00:00
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}
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2002-12-03 23:15:19 +00:00
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MachineBasicBlock::iterator
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2002-12-13 09:54:36 +00:00
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RegAllocSimple::savePhysRegToStack (MachineBasicBlock *MBB,
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MachineBasicBlock::iterator I,
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2002-12-03 23:15:19 +00:00
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unsigned PhysReg)
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{
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const TargetRegisterClass* regClass = MF->getRegClass(PhysReg);
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assert(regClass);
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unsigned offset = allocateStackSpaceFor(PhysReg, regClass);
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// Add move instruction(s)
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2002-12-13 09:54:36 +00:00
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return RegInfo->storeReg2RegOffset(MBB, I, PhysReg,
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2002-12-03 23:15:19 +00:00
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RegInfo->getFramePointer(),
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offset, regClass->getDataSize());
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}
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2002-11-22 22:44:32 +00:00
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bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
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2002-12-04 23:58:08 +00:00
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cleanupAfterFunction();
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2002-11-22 22:44:32 +00:00
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unsigned virtualReg, physReg;
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DEBUG(std::cerr << "Machine Function " << "\n");
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MF = &Fn;
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2002-12-03 23:15:19 +00:00
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2002-11-22 22:44:32 +00:00
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for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
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MBB != MBBe; ++MBB)
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{
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CurrMBB = &(*MBB);
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2002-12-13 09:54:36 +00:00
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// Handle PHI instructions specially: add moves to each pred block
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while (MBB->front()->getOpcode() == 0) {
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MachineInstr *MI = MBB->front();
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// get rid of the phi
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MBB->erase(MBB->begin());
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DEBUG(std::cerr << "num ops: " << MI->getNumOperands() << "\n");
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MachineOperand &targetReg = MI->getOperand(0);
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// If it's a virtual register, allocate a physical one
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// otherwise, just use whatever register is there now
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// note: it MUST be a register -- we're assigning to it
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virtualReg = (unsigned) targetReg.getAllocatedRegNum();
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if (targetReg.isVirtualRegister()) {
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physReg = getFreeReg(virtualReg);
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} else {
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physReg = targetReg.getAllocatedRegNum();
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}
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// Find the register class of the target register: should be the
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// same as the values we're trying to store there
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const TargetRegisterClass* regClass = PhysReg2RegClassMap[physReg];
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assert(regClass && "Target register class not found!");
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unsigned dataSize = regClass->getDataSize();
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for (int i = MI->getNumOperands() - 1; i >= 2; i-=2) {
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MachineOperand &opVal = MI->getOperand(i-1);
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// Get the MachineBasicBlock equivalent of the BasicBlock that is the
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// source path the phi
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BasicBlock *opBB =
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cast<BasicBlock>(MI->getOperand(i).getVRegValue());
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MachineBasicBlock *opBlock = NULL;
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for (MachineFunction::iterator opFi = Fn.begin(), opFe = Fn.end();
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opFi != opFe; ++opFi)
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{
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if (opFi->getBasicBlock() == opBB) {
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opBlock = opFi; break;
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}
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}
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assert(opBlock && "MachineBasicBlock object not found for specified block!");
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MachineBasicBlock::iterator opI = opBlock->end();
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MachineInstr *opMI = *(--opI);
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const MachineInstrInfo &MII = TM.getInstrInfo();
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// insert the move just before the return/branch
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if (MII.isReturn(opMI->getOpcode()) || MII.isBranch(opMI->getOpcode()))
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{
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// Retrieve the constant value from this op, move it to target
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// register of the phi
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if (opVal.getType() == MachineOperand::MO_SignExtendedImmed ||
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opVal.getType() == MachineOperand::MO_UnextendedImmed)
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{
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opI = RegInfo->moveImm2Reg(opBlock, opI, physReg,
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(unsigned) opVal.getImmedValue(),
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dataSize);
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saveVirtRegToStack(opBlock, opI, virtualReg, physReg);
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} else {
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// Allocate a physical register and add a move in the BB
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unsigned opVirtualReg = (unsigned) opVal.getAllocatedRegNum();
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unsigned opPhysReg; // = getFreeReg(opVirtualReg);
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opI = moveUseToReg(opBlock, opI, opVirtualReg, opPhysReg);
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opI = RegInfo->moveReg2Reg(opBlock, opI, physReg, opPhysReg,
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dataSize);
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// Save that register value to the stack of the TARGET REG
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saveVirtRegToStack(opBlock, opI, virtualReg, opPhysReg);
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}
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}
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}
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// really delete the instruction
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delete MI;
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}
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2002-11-22 22:44:32 +00:00
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//loop over each basic block
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for (MachineBasicBlock::iterator I = MBB->begin(); I != MBB->end(); ++I)
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{
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MachineInstr *MI = *I;
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2002-12-03 23:15:19 +00:00
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// FIXME: add a preliminary pass that will invalidate any registers that
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// are used by the instruction (including implicit uses)
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2002-12-13 09:54:36 +00:00
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// Loop over uses, move from memory into registers
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2002-11-22 22:44:32 +00:00
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for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
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MachineOperand &op = MI->getOperand(i);
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if (op.getType() == MachineOperand::MO_SignExtendedImmed ||
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op.getType() == MachineOperand::MO_UnextendedImmed)
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{
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DEBUG(std::cerr << "const\n");
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} else if (op.isVirtualRegister()) {
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virtualReg = (unsigned) op.getAllocatedRegNum();
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DEBUG(std::cerr << "op: " << op << "\n");
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DEBUG(std::cerr << "\t inst[" << i << "]: ";
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MI->print(std::cerr, TM));
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2002-12-12 23:20:31 +00:00
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// make sure the same virtual register maps to the same physical
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// register in any given instruction
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if (VirtReg2PhysRegMap.find(virtualReg) != VirtReg2PhysRegMap.end()) {
|
|
|
|
physReg = VirtReg2PhysRegMap[virtualReg];
|
2002-12-02 21:11:58 +00:00
|
|
|
} else {
|
2002-12-12 23:20:31 +00:00
|
|
|
if (op.opIsDef()) {
|
|
|
|
if (TM.getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) {
|
|
|
|
// must be same register number as the first operand
|
|
|
|
// This maps a = b + c into b += c, and saves b into a's spot
|
|
|
|
physReg = (unsigned) MI->getOperand(1).getAllocatedRegNum();
|
|
|
|
} else {
|
|
|
|
physReg = getFreeReg(virtualReg);
|
|
|
|
}
|
|
|
|
MachineBasicBlock::iterator J = I;
|
2002-12-13 09:54:36 +00:00
|
|
|
J = saveVirtRegToStack(CurrMBB, ++J, virtualReg, physReg);
|
2002-12-12 23:20:31 +00:00
|
|
|
I = --J;
|
|
|
|
} else {
|
2002-12-13 09:54:36 +00:00
|
|
|
I = moveUseToReg(CurrMBB, I, virtualReg, physReg);
|
2002-12-12 23:20:31 +00:00
|
|
|
}
|
|
|
|
VirtReg2PhysRegMap[virtualReg] = physReg;
|
2002-12-02 21:11:58 +00:00
|
|
|
}
|
|
|
|
MI->SetMachineOperandReg(i, physReg);
|
2002-11-22 22:44:32 +00:00
|
|
|
DEBUG(std::cerr << "virt: " << virtualReg <<
|
|
|
|
", phys: " << op.getAllocatedRegNum() << "\n");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
clearAllRegs();
|
2002-12-12 23:20:31 +00:00
|
|
|
VirtReg2PhysRegMap.clear();
|
2002-11-22 22:44:32 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
2002-12-04 23:58:08 +00:00
|
|
|
// add prologue we should preserve callee-save registers...
|
|
|
|
MachineFunction::iterator Fi = Fn.begin();
|
|
|
|
MachineBasicBlock *MBB = Fi;
|
|
|
|
MachineBasicBlock::iterator MBBi = MBB->begin();
|
|
|
|
RegInfo->emitPrologue(MBB, MBBi, NumBytesAllocated);
|
|
|
|
|
|
|
|
// add epilogue to restore the callee-save registers
|
|
|
|
// loop over the basic block
|
|
|
|
for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
|
|
|
|
MBB != MBBe; ++MBB)
|
|
|
|
{
|
|
|
|
// check if last instruction is a RET
|
|
|
|
MachineBasicBlock::iterator I = (*MBB).end();
|
|
|
|
MachineInstr *MI = *(--I);
|
|
|
|
const MachineInstrInfo &MII = TM.getInstrInfo();
|
|
|
|
if (MII.isReturn(MI->getOpcode())) {
|
|
|
|
// this block has a return instruction, add epilogue
|
|
|
|
RegInfo->emitEpilogue(MBB, I, NumBytesAllocated);
|
|
|
|
}
|
|
|
|
}
|
2002-11-22 22:44:32 +00:00
|
|
|
|
|
|
|
return false; // We never modify the LLVM itself.
|
|
|
|
}
|
|
|
|
|
|
|
|
Pass *createSimpleX86RegisterAllocator(TargetMachine &TM) {
|
|
|
|
return new RegAllocSimple(TM);
|
|
|
|
}
|