llvm/test/CodeGen/X86/pr26835.ll

; RUN: llc < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux"

; CHECK-LABEL: foo
; CHECK: div
define i24 @foo(i24 %a, i24 %b) {
  %r = urem i24 %a, %b
  ret i24 %r
}
[DAGCombine] Fix divrem combine not to assume div/rem type is simple. The divrem combine assumed the type of the div/rem is simple, which isn't necessarily true. This probably worked fine until r250825, since it only saw legal types, but now breaks when it runs as a pre-type-legalization combine. This fixes PR26835. Differential Revision: http://reviews.llvm.org/D17878 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262746 91177308-0d34-0410-b5e6-96231b3b80d8 2016-03-04 21:23:29 +00:00			`; RUN: llc < %s \| FileCheck %s`
			`target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"`
			`target triple = "x86_64-pc-linux"`

			`; CHECK-LABEL: foo`
			`; CHECK: div`
			`define i24 @foo(i24 %a, i24 %b) {`
			`%r = urem i24 %a, %b`
			`ret i24 %r`
			`}`