llvm/test/CodeGen/X86/widen_conv-2.ll

; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s
; CHECK: movswl
; CHECK: movswl

; sign extension v2i32 to v2i16

define void @convert(<2 x i32>* %dst.addr, <2 x i16> %src) nounwind {
entry:
	%signext = sext <2 x i16> %src to <2 x i32>		; <<12 x i8>> [#uses=1]
	store <2 x i32> %signext, <2 x i32>* %dst.addr
	ret void
}
now that generic vector types aren't selected onto MMX registers, these tests don't need -disable-mmx. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122188 91177308-0d34-0410-b5e6-96231b3b80d8 2010-12-19 20:12:58 +00:00			`; RUN: llc < %s -march=x86 -mattr=+sse42 \| FileCheck %s`
As Dan pointed out, movzbl, movsbl, and friends are nicer than their alias (movzx/movsx) because they give more information. Revert that part of the patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129498 91177308-0d34-0410-b5e6-96231b3b80d8 2011-04-14 01:46:37 +00:00			`; CHECK: movswl`
			`; CHECK: movswl`
Added some basic test cases for r61209 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61210 91177308-0d34-0410-b5e6-96231b3b80d8 2008-12-18 20:05:58 +00:00
			`; sign extension v2i32 to v2i16`

			`define void @convert(<2 x i32>* %dst.addr, <2 x i16> %src) nounwind {`
			`entry:`
			`%signext = sext <2 x i16> %src to <2 x i32> ; <<12 x i8>> [#uses=1]`
			`store <2 x i32> %signext, <2 x i32>* %dst.addr`
			`ret void`
			`}`