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psad, pmax, pmin intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27647 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1421,7 +1421,6 @@ def PMULUDQrr : PDI<0xF4, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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[(set VR128:$dst, (int_x86_sse2_pmulu_dq VR128:$src1,
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VR128:$src2))]>;
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}
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def PMULHUWrm : PDI<0xE4, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pmulhuw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pmulhu_w VR128:$src1,
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@ -1440,16 +1439,19 @@ def PMULUDQrm : PDI<0xF4, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2
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[(set VR128:$dst, (int_x86_sse2_pmulu_dq VR128:$src1,
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(bc_v4i32 (loadv2i64 addr:$src2))))]>;
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let isCommutable = 1 in {
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def PMADDWDrr : PDI<0xF5, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pmaddwd {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pmadd_wd VR128:$src1,
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VR128:$src2))]>;
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}
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def PMADDWDrm : PDI<0xF5, MRMSrcMem,
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(ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pmaddwd {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pmadd_wd VR128:$src1,
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(bc_v8i16 (loadv2i64 addr:$src2))))]>;
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let isCommutable = 1 in {
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def PAVGBrr : PDI<0xE0, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pavgb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pavg_b VR128:$src1,
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@ -1458,6 +1460,7 @@ def PAVGWrr : PDI<0xE3, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pavgw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pavg_w VR128:$src1,
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VR128:$src2))]>;
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}
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def PAVGBrm : PDI<0xE0, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pavgb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pavg_b VR128:$src1,
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@ -1466,6 +1469,56 @@ def PAVGWrm : PDI<0xE3, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pavgw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pavg_w VR128:$src1,
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(bc_v8i16 (loadv2i64 addr:$src2))))]>;
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let isCommutable = 1 in {
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def PMAXUBrr : PDI<0xDE, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pmaxub {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pmaxu_b VR128:$src1,
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VR128:$src2))]>;
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def PMAXSWrr : PDI<0xEE, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pmaxsw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pmaxs_w VR128:$src1,
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VR128:$src2))]>;
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}
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def PMAXUBrm : PDI<0xDE, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pmaxub {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pmaxu_b VR128:$src1,
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(bc_v16i8 (loadv2i64 addr:$src2))))]>;
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def PMAXSWrm : PDI<0xEE, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pmaxsw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pmaxs_w VR128:$src1,
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(bc_v8i16 (loadv2i64 addr:$src2))))]>;
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let isCommutable = 1 in {
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def PMINUBrr : PDI<0xDA, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pminub {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pminu_b VR128:$src1,
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VR128:$src2))]>;
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def PMINSWrr : PDI<0xEA, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pminsw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pmins_w VR128:$src1,
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VR128:$src2))]>;
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}
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def PMINUBrm : PDI<0xDA, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pminub {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pminu_b VR128:$src1,
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(bc_v16i8 (loadv2i64 addr:$src2))))]>;
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def PMINSWrm : PDI<0xEA, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pminsw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_pmins_w VR128:$src1,
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(bc_v8i16 (loadv2i64 addr:$src2))))]>;
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let isCommutable = 1 in {
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def PSADBWrr : PDI<0xE0, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psadbw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psad_bw VR128:$src1,
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VR128:$src2))]>;
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}
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def PSADBWrm : PDI<0xE0, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psadbw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psad_bw VR128:$src1,
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(bc_v16i8 (loadv2i64 addr:$src2))))]>;
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}
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let isTwoAddress = 1 in {
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