Pruned includes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19813 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2005-01-24 18:37:48 +00:00
parent dd106c2f8b
commit 01269524ce

View File

@ -1,4 +1,4 @@
//===-- AlphaAsmPrinter.cpp - Alpha LLVM assembly writer --------------===// //===-- AlphaAsmPrinter.cpp - Alpha LLVM assembly writer ------------------===//
// //
// The LLVM Compiler Infrastructure // The LLVM Compiler Infrastructure
// //
@ -14,25 +14,17 @@
#include "Alpha.h" #include "Alpha.h"
#include "AlphaInstrInfo.h" #include "AlphaInstrInfo.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Module.h" #include "llvm/Module.h"
#include "llvm/Assembly/Writer.h" #include "llvm/Assembly/Writer.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/ValueTypes.h" #include "llvm/CodeGen/ValueTypes.h"
#include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include "llvm/Target/MRegisterInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/Mangler.h" #include "llvm/Support/Mangler.h"
#include "llvm/ADT/Statistic.h" #include "llvm/ADT/Statistic.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/CommandLine.h"
#include <cctype>
using namespace llvm; using namespace llvm;
namespace { namespace {
@ -87,7 +79,7 @@ void AlphaAsmPrinter::printOperand(const MachineInstr *MI, int opNum, MVT::Value
const MachineOperand &MO = MI->getOperand(opNum); const MachineOperand &MO = MI->getOperand(opNum);
if (MO.getType() == MachineOperand::MO_MachineRegister) { if (MO.getType() == MachineOperand::MO_MachineRegister) {
assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??"); assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??");
O << LowercaseString(TM.getRegisterInfo()->get(MO.getReg()).Name); O << TM.getRegisterInfo()->get(MO.getReg()).Name;
} else if (MO.isImmediate()) { } else if (MO.isImmediate()) {
O << MO.getImmedValue(); O << MO.getImmedValue();
} else { } else {
@ -109,7 +101,7 @@ void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
// FALLTHROUGH // FALLTHROUGH
case MachineOperand::MO_MachineRegister: case MachineOperand::MO_MachineRegister:
case MachineOperand::MO_CCRegister: case MachineOperand::MO_CCRegister:
O << LowercaseString(RI.get(MO.getReg()).Name); O << RI.get(MO.getReg()).Name;
return; return;
case MachineOperand::MO_SignExtendedImmed: case MachineOperand::MO_SignExtendedImmed:
@ -119,7 +111,7 @@ void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
return; return;
case MachineOperand::MO_PCRelativeDisp: case MachineOperand::MO_PCRelativeDisp:
std::cerr << "Shouldn't use addPCDisp() when building PPC MachineInstrs"; std::cerr << "Shouldn't use addPCDisp() when building Alpha MachineInstrs";
abort(); abort();
return; return;
@ -140,8 +132,6 @@ void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
return; return;
case MachineOperand::MO_GlobalAddress: case MachineOperand::MO_GlobalAddress:
//std::cerr << "Global Addresses? Are you kidding?\n"
//abort();
O << Mang->getValueName(MO.getGlobal()); O << Mang->getValueName(MO.getGlobal());
return; return;