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[mips][msa] Direct Object Emission of INSVE.{b,h,w,d}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192587 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1263,23 +1263,23 @@ class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
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}
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class MSA_INSERT_PSEUDO_BASE<SDPatternOperator OpNode, ValueType Ty,
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RegisterClass RCWD, RegisterClass RCFS> :
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MipsPseudo<(outs RCWD:$wd), (ins RCWD:$wd_in, uimm6:$n, RCFS:$fs),
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[(set RCWD:$wd, (OpNode (Ty RCWD:$wd_in), RCFS:$fs,
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RegisterOperand ROWD, RegisterOperand ROFS> :
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MipsPseudo<(outs ROWD:$wd), (ins ROWD:$wd_in, uimm6:$n, ROFS:$fs),
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[(set ROWD:$wd, (OpNode (Ty ROWD:$wd_in), ROFS:$fs,
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immZExt6:$n))]> {
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bit usesCustomInserter = 1;
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string Constraints = "$wd = $wd_in";
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}
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class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
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RegisterClass RCWD, RegisterClass RCWS = RCWD,
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RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
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InstrItinClass itin = NoItinerary> {
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dag OutOperandList = (outs RCWD:$wd);
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dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws);
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dag OutOperandList = (outs ROWD:$wd);
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dag InOperandList = (ins ROWD:$wd_in, uimm6:$n, ROWS:$ws);
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string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]");
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list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in,
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list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in,
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immZExt6:$n,
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RCWS:$ws))];
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ROWS:$ws))];
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InstrItinClass Itinerary = itin;
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string Constraints = "$wd = $wd_in";
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}
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@ -1983,14 +1983,18 @@ class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32,
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MSA128WOpnd, GPR32Opnd>;
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class INSERT_FW_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v4f32,
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MSA128W, FGR32>;
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MSA128WOpnd, FGR32Opnd>;
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class INSERT_FD_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v2f64,
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MSA128D, FGR64>;
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MSA128DOpnd, FGR64Opnd>;
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class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>;
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class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>;
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class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>;
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class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>;
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class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b,
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MSA128BOpnd>;
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class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h,
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MSA128HOpnd>;
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class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w,
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MSA128WOpnd>;
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class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d,
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MSA128DOpnd>;
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class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
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ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem,
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18
test/MC/Mips/msa/test_elm_insve.s
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18
test/MC/Mips/msa/test_elm_insve.s
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@ -0,0 +1,18 @@
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# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
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#
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# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
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#
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# CHECK: insve.b $w25[3], $w9[0] # encoding: [0x79,0x43,0x4e,0x59]
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# CHECK: insve.h $w24[2], $w2[0] # encoding: [0x79,0x62,0x16,0x19]
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# CHECK: insve.w $w0[2], $w13[0] # encoding: [0x79,0x72,0x68,0x19]
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# CHECK: insve.d $w3[0], $w18[0] # encoding: [0x79,0x78,0x90,0xd9]
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# CHECKOBJDUMP: insve.b $w25[3], $w9[0]
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# CHECKOBJDUMP: insve.h $w24[2], $w2[0]
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# CHECKOBJDUMP: insve.w $w0[2], $w13[0]
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# CHECKOBJDUMP: insve.d $w3[0], $w18[0]
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insve.b $w25[3], $w9[0]
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insve.h $w24[2], $w2[0]
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insve.w $w0[2], $w13[0]
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insve.d $w3[0], $w18[0]
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