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synced 2025-04-03 13:51:39 +00:00
Fix memory leaks by avoiding extra manual dynamic allocation
Improvement to r244212. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244252 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -736,14 +736,13 @@ public:
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O.indent(4) << '}';
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}
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bool operator==(const IAPrinter &RHS) {
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bool operator==(const IAPrinter &RHS) const {
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if (Conds.size() != RHS.Conds.size())
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return false;
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unsigned Idx = 0;
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for (std::vector<std::string>::iterator
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I = Conds.begin(), E = Conds.end(); I != E; ++I)
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if (*I != RHS.Conds[Idx++])
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for (const auto &str : Conds)
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if (str != RHS.Conds[Idx++])
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return false;
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return true;
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@ -762,12 +761,12 @@ static unsigned CountNumOperands(StringRef AsmString, unsigned Variant) {
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namespace {
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struct AliasPriorityComparator {
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typedef std::pair<CodeGenInstAlias *, int> ValueType;
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typedef std::pair<CodeGenInstAlias, int> ValueType;
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bool operator()(const ValueType &LHS, const ValueType &RHS) {
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if (LHS.second == RHS.second) {
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// We don't actually care about the order, but for consistency it
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// shouldn't depend on pointer comparisons.
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return LHS.first->TheDef->getName() < RHS.first->TheDef->getName();
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return LHS.first.TheDef->getName() < RHS.first.TheDef->getName();
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}
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// Aliases with larger priorities should be considered first.
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@ -796,12 +795,11 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
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Records.getAllDerivedDefinitions("InstAlias");
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// Create a map from the qualified name to a list of potential matches.
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typedef std::set<std::pair<CodeGenInstAlias*, int>, AliasPriorityComparator>
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typedef std::set<std::pair<CodeGenInstAlias, int>, AliasPriorityComparator>
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AliasWithPriority;
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std::map<std::string, AliasWithPriority> AliasMap;
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for (std::vector<Record*>::iterator
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I = AllInstAliases.begin(), E = AllInstAliases.end(); I != E; ++I) {
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CodeGenInstAlias *Alias = new CodeGenInstAlias(*I, Variant, Target);
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const Record *R = *I;
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int Priority = R->getValueAsInt("EmitPriority");
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if (Priority < 1)
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@ -809,13 +807,13 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
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const DagInit *DI = R->getValueAsDag("ResultInst");
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const DefInit *Op = cast<DefInit>(DI->getOperator());
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AliasMap[getQualifiedName(Op->getDef())].insert(std::make_pair(Alias,
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Priority));
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AliasMap[getQualifiedName(Op->getDef())].insert(
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std::make_pair(CodeGenInstAlias(*I, Variant, Target), Priority));
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}
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// A map of which conditions need to be met for each instruction operand
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// before it can be matched to the mnemonic.
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std::map<std::string, std::vector<IAPrinter*> > IAPrinterMap;
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std::map<std::string, std::vector<IAPrinter>> IAPrinterMap;
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// A list of MCOperandPredicates for all operands in use, and the reverse map
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std::vector<const Record*> MCOpPredicates;
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@ -823,25 +821,24 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
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for (auto &Aliases : AliasMap) {
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for (auto &Alias : Aliases.second) {
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const CodeGenInstAlias *CGA = Alias.first;
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unsigned LastOpNo = CGA->ResultInstOperandIndex.size();
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const CodeGenInstAlias &CGA = Alias.first;
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unsigned LastOpNo = CGA.ResultInstOperandIndex.size();
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unsigned NumResultOps =
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CountNumOperands(CGA->ResultInst->AsmString, Variant);
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CountNumOperands(CGA.ResultInst->AsmString, Variant);
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// Don't emit the alias if it has more operands than what it's aliasing.
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if (NumResultOps < CountNumOperands(CGA->AsmString, Variant))
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if (NumResultOps < CountNumOperands(CGA.AsmString, Variant))
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continue;
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IAPrinter *IAP = new IAPrinter(CGA->Result->getAsString(),
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CGA->AsmString);
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IAPrinter IAP(CGA.Result->getAsString(), CGA.AsmString);
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unsigned NumMIOps = 0;
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for (auto &Operand : CGA->ResultOperands)
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for (auto &Operand : CGA.ResultOperands)
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NumMIOps += Operand.getMINumOperands();
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std::string Cond;
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Cond = std::string("MI->getNumOperands() == ") + llvm::utostr(NumMIOps);
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IAP->addCond(Cond);
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IAP.addCond(Cond);
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bool CantHandle = false;
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@ -849,7 +846,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
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for (unsigned i = 0, e = LastOpNo; i != e; ++i) {
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std::string Op = "MI->getOperand(" + llvm::utostr(MIOpNum) + ")";
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const CodeGenInstAlias::ResultOperand &RO = CGA->ResultOperands[i];
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const CodeGenInstAlias::ResultOperand &RO = CGA.ResultOperands[i];
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switch (RO.Kind) {
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case CodeGenInstAlias::ResultOperand::K_Record: {
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@ -875,11 +872,11 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
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if (Rec->isSubClassOf("RegisterOperand"))
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Rec = Rec->getValueAsDef("RegClass");
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if (Rec->isSubClassOf("RegisterClass")) {
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IAP->addCond(Op + ".isReg()");
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IAP.addCond(Op + ".isReg()");
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if (!IAP->isOpMapped(ROName)) {
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IAP->addOperand(ROName, MIOpNum, PrintMethodIdx);
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Record *R = CGA->ResultOperands[i].getRecord();
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if (!IAP.isOpMapped(ROName)) {
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IAP.addOperand(ROName, MIOpNum, PrintMethodIdx);
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Record *R = CGA.ResultOperands[i].getRecord();
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if (R->isSubClassOf("RegisterOperand"))
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R = R->getValueAsDef("RegClass");
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Cond = std::string("MRI.getRegClass(") + Target.getName() + "::" +
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@ -887,12 +884,12 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
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".contains(" + Op + ".getReg())";
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} else {
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Cond = Op + ".getReg() == MI->getOperand(" +
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llvm::utostr(IAP->getOpIndex(ROName)) + ").getReg()";
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llvm::utostr(IAP.getOpIndex(ROName)) + ").getReg()";
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}
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} else {
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// Assume all printable operands are desired for now. This can be
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// overridden in the InstAlias instantiation if necessary.
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IAP->addOperand(ROName, MIOpNum, PrintMethodIdx);
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IAP.addOperand(ROName, MIOpNum, PrintMethodIdx);
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// There might be an additional predicate on the MCOperand
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unsigned Entry = MCOpPredicateMap[Rec];
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@ -908,39 +905,38 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
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Op + ", " + llvm::utostr(Entry) + ")";
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}
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// for all subcases of ResultOperand::K_Record:
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IAP->addCond(Cond);
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IAP.addCond(Cond);
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break;
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}
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case CodeGenInstAlias::ResultOperand::K_Imm: {
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// Just because the alias has an immediate result, doesn't mean the
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// MCInst will. An MCExpr could be present, for example.
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IAP->addCond(Op + ".isImm()");
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IAP.addCond(Op + ".isImm()");
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Cond = Op + ".getImm() == "
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+ llvm::utostr(CGA->ResultOperands[i].getImm());
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IAP->addCond(Cond);
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Cond = Op + ".getImm() == " +
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llvm::utostr(CGA.ResultOperands[i].getImm());
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IAP.addCond(Cond);
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break;
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}
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case CodeGenInstAlias::ResultOperand::K_Reg:
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// If this is zero_reg, something's playing tricks we're not
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// equipped to handle.
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if (!CGA->ResultOperands[i].getRegister()) {
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if (!CGA.ResultOperands[i].getRegister()) {
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CantHandle = true;
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break;
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}
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Cond = Op + ".getReg() == " + Target.getName() +
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"::" + CGA->ResultOperands[i].getRegister()->getName();
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IAP->addCond(Cond);
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Cond = Op + ".getReg() == " + Target.getName() + "::" +
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CGA.ResultOperands[i].getRegister()->getName();
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IAP.addCond(Cond);
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break;
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}
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if (!IAP) break;
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MIOpNum += RO.getMINumOperands();
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}
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if (CantHandle) continue;
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IAPrinterMap[Aliases.first].push_back(IAP);
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IAPrinterMap[Aliases.first].push_back(std::move(IAP));
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}
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}
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@ -959,30 +955,26 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
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std::string Cases;
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raw_string_ostream CasesO(Cases);
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for (std::map<std::string, std::vector<IAPrinter*> >::iterator
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I = IAPrinterMap.begin(), E = IAPrinterMap.end(); I != E; ++I) {
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std::vector<IAPrinter*> &IAPs = I->second;
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for (auto &Entry : IAPrinterMap) {
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std::vector<IAPrinter> &IAPs = Entry.second;
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std::vector<IAPrinter*> UniqueIAPs;
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for (std::vector<IAPrinter*>::iterator
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II = IAPs.begin(), IE = IAPs.end(); II != IE; ++II) {
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IAPrinter *LHS = *II;
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for (auto &LHS : IAPs) {
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bool IsDup = false;
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for (std::vector<IAPrinter*>::iterator
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III = IAPs.begin(), IIE = IAPs.end(); III != IIE; ++III) {
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IAPrinter *RHS = *III;
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if (LHS != RHS && *LHS == *RHS) {
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for (const auto &RHS : IAPs) {
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if (&LHS != &RHS && LHS == RHS) {
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IsDup = true;
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break;
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}
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}
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if (!IsDup) UniqueIAPs.push_back(LHS);
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if (!IsDup)
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UniqueIAPs.push_back(&LHS);
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}
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if (UniqueIAPs.empty()) continue;
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CasesO.indent(2) << "case " << I->first << ":\n";
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CasesO.indent(2) << "case " << Entry.first << ":\n";
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for (std::vector<IAPrinter*>::iterator
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II = UniqueIAPs.begin(), IE = UniqueIAPs.end(); II != IE; ++II) {
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@ -1099,14 +1091,6 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
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}
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O << "#endif // PRINT_ALIAS_INSTR\n";
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// Free allocated memory.
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for (auto &Aliases : AliasMap)
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for (auto &Alias : Aliases.second)
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delete Alias.first;
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for (auto &P : IAPrinterMap)
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for (IAPrinter* IAP : P.second)
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delete IAP;
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}
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AsmWriterEmitter::AsmWriterEmitter(RecordKeeper &R) : Records(R), Target(R) {
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