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Re-apply r286384, "X86: Introduce the "relocImm" ComplexPattern, which represents a relocatable immediate.", with a fix for 32-bit x86.
Teach X86InstrInfo::analyzeCompare() not to crash on CMP and SUB instructions that take a global address operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286420 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1165,10 +1165,12 @@ class Pat<dag pattern, dag result> : Pattern<pattern, [result]>;
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// e.g. X86 addressing mode - def addr : ComplexPattern<4, "SelectAddr", [add]>;
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//
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class ComplexPattern<ValueType ty, int numops, string fn,
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list<SDNode> roots = [], list<SDNodeProperty> props = []> {
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list<SDNode> roots = [], list<SDNodeProperty> props = [],
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int complexity = -1> {
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ValueType Ty = ty;
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int NumOperands = numops;
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string SelectFunc = fn;
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list<SDNode> RootNodes = roots;
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list<SDNodeProperty> Properties = props;
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int Complexity = complexity;
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}
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@ -228,6 +228,7 @@ namespace {
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SDValue &Index, SDValue &Disp,
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SDValue &Segment,
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SDValue &NodeWithChain);
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bool selectRelocImm(SDValue N, SDValue &Op);
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bool tryFoldLoad(SDNode *P, SDValue N,
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SDValue &Base, SDValue &Scale,
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@ -1704,6 +1705,27 @@ bool X86DAGToDAGISel::selectTLSADDRAddr(SDValue N, SDValue &Base,
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return true;
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}
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bool X86DAGToDAGISel::selectRelocImm(SDValue N, SDValue &Op) {
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if (auto *CN = dyn_cast<ConstantSDNode>(N)) {
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Op = CurDAG->getTargetConstant(CN->getAPIntValue(), SDLoc(CN),
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N.getValueType());
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return true;
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}
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if (N.getOpcode() != X86ISD::Wrapper)
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return false;
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unsigned Opc = N.getOperand(0)->getOpcode();
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if (Opc == ISD::TargetConstantPool || Opc == ISD::TargetJumpTable ||
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Opc == ISD::TargetExternalSymbol || Opc == ISD::TargetGlobalAddress ||
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Opc == ISD::TargetGlobalTLSAddress || Opc == ISD::MCSymbol ||
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Opc == ISD::TargetBlockAddress) {
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Op = N.getOperand(0);
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return true;
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}
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return false;
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}
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bool X86DAGToDAGISel::tryFoldLoad(SDNode *P, SDValue N,
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SDValue &Base, SDValue &Scale,
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@ -1025,53 +1025,6 @@ def : Pat<(store (i32 -1), addr:$dst), (OR32mi8 addr:$dst, -1)>;
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def : Pat<(store (i64 -1), addr:$dst), (OR64mi8 addr:$dst, -1)>;
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}
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// ConstantPool GlobalAddress, ExternalSymbol, and JumpTable
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def : Pat<(i32 (X86Wrapper tconstpool :$dst)), (MOV32ri tconstpool :$dst)>;
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def : Pat<(i32 (X86Wrapper tjumptable :$dst)), (MOV32ri tjumptable :$dst)>;
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def : Pat<(i32 (X86Wrapper tglobaltlsaddr:$dst)),(MOV32ri tglobaltlsaddr:$dst)>;
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def : Pat<(i32 (X86Wrapper tglobaladdr :$dst)), (MOV32ri tglobaladdr :$dst)>;
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def : Pat<(i32 (X86Wrapper texternalsym:$dst)), (MOV32ri texternalsym:$dst)>;
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def : Pat<(i32 (X86Wrapper mcsym:$dst)), (MOV32ri mcsym:$dst)>;
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def : Pat<(i32 (X86Wrapper tblockaddress:$dst)), (MOV32ri tblockaddress:$dst)>;
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def : Pat<(add GR32:$src1, (X86Wrapper tconstpool:$src2)),
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(ADD32ri GR32:$src1, tconstpool:$src2)>;
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def : Pat<(add GR32:$src1, (X86Wrapper tjumptable:$src2)),
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(ADD32ri GR32:$src1, tjumptable:$src2)>;
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def : Pat<(add GR32:$src1, (X86Wrapper tglobaladdr :$src2)),
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(ADD32ri GR32:$src1, tglobaladdr:$src2)>;
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def : Pat<(add GR32:$src1, (X86Wrapper texternalsym:$src2)),
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(ADD32ri GR32:$src1, texternalsym:$src2)>;
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def : Pat<(add GR32:$src1, (X86Wrapper mcsym:$src2)),
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(ADD32ri GR32:$src1, mcsym:$src2)>;
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def : Pat<(add GR32:$src1, (X86Wrapper tblockaddress:$src2)),
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(ADD32ri GR32:$src1, tblockaddress:$src2)>;
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def : Pat<(store (i32 (X86Wrapper tglobaladdr:$src)), addr:$dst),
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(MOV32mi addr:$dst, tglobaladdr:$src)>;
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def : Pat<(store (i32 (X86Wrapper texternalsym:$src)), addr:$dst),
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(MOV32mi addr:$dst, texternalsym:$src)>;
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def : Pat<(store (i32 (X86Wrapper mcsym:$src)), addr:$dst),
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(MOV32mi addr:$dst, mcsym:$src)>;
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def : Pat<(store (i32 (X86Wrapper tblockaddress:$src)), addr:$dst),
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(MOV32mi addr:$dst, tblockaddress:$src)>;
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// ConstantPool GlobalAddress, ExternalSymbol, and JumpTable when not in small
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// code model mode, should use 'movabs'. FIXME: This is really a hack, the
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// 'movabs' predicate should handle this sort of thing.
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def : Pat<(i64 (X86Wrapper tconstpool :$dst)),
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(MOV64ri tconstpool :$dst)>, Requires<[FarData]>;
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def : Pat<(i64 (X86Wrapper tjumptable :$dst)),
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(MOV64ri tjumptable :$dst)>, Requires<[FarData]>;
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def : Pat<(i64 (X86Wrapper tglobaladdr :$dst)),
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(MOV64ri tglobaladdr :$dst)>, Requires<[FarData]>;
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def : Pat<(i64 (X86Wrapper texternalsym:$dst)),
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(MOV64ri texternalsym:$dst)>, Requires<[FarData]>;
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def : Pat<(i64 (X86Wrapper mcsym:$dst)),
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(MOV64ri mcsym:$dst)>, Requires<[FarData]>;
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def : Pat<(i64 (X86Wrapper tblockaddress:$dst)),
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(MOV64ri tblockaddress:$dst)>, Requires<[FarData]>;
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// In kernel code model, we can get the address of a label
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// into a register with 'movq'. FIXME: This is a hack, the 'imm' predicate of
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// the MOV64ri32 should accept these.
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@ -5303,6 +5303,8 @@ bool X86InstrInfo::analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
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case X86::CMP16ri:
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case X86::CMP16ri8:
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case X86::CMP8ri:
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if (!MI.getOperand(1).isImm())
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return false;
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SrcReg = MI.getOperand(0).getReg();
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SrcReg2 = 0;
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CmpMask = ~0;
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@ -5334,6 +5336,8 @@ bool X86InstrInfo::analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
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case X86::SUB16ri:
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case X86::SUB16ri8:
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case X86::SUB8ri:
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if (!MI.getOperand(2).isImm())
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return false;
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SrcReg = MI.getOperand(1).getReg();
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SrcReg2 = 0;
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CmpMask = ~0;
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@ -765,6 +765,12 @@ def tls64baseaddr : ComplexPattern<i64, 5, "selectTLSADDRAddr",
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def vectoraddr : ComplexPattern<iPTR, 5, "selectVectorAddr", [],[SDNPWantParent]>;
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// A relocatable immediate is either an immediate operand or an operand that can
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// be relocated by the linker to an immediate, such as a regular symbol in
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// non-PIC code.
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def relocImm : ComplexPattern<iAny, 1, "selectRelocImm", [imm, X86Wrapper], [],
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0>;
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//===----------------------------------------------------------------------===//
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// X86 Instruction Predicate Definitions.
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def TruePredicate : Predicate<"true">;
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@ -877,8 +883,6 @@ def IsNaCl : Predicate<"Subtarget->isTargetNaCl()">;
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def NotNaCl : Predicate<"!Subtarget->isTargetNaCl()">;
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def SmallCode : Predicate<"TM.getCodeModel() == CodeModel::Small">;
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def KernelCode : Predicate<"TM.getCodeModel() == CodeModel::Kernel">;
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def FarData : Predicate<"TM.getCodeModel() != CodeModel::Small &&"
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"TM.getCodeModel() != CodeModel::Kernel">;
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def NearData : Predicate<"TM.getCodeModel() == CodeModel::Small ||"
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"TM.getCodeModel() == CodeModel::Kernel">;
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def IsNotPIC : Predicate<"!TM.isPositionIndependent()">;
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@ -950,7 +954,7 @@ def imm8_su : PatLeaf<(i8 imm), [{
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def imm16_su : PatLeaf<(i16 imm), [{
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return !shouldAvoidImmediateInstFormsForSize(N);
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}]>;
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def imm32_su : PatLeaf<(i32 imm), [{
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def imm32_su : PatLeaf<(i32 relocImm), [{
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return !shouldAvoidImmediateInstFormsForSize(N);
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}]>;
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def i64immSExt32_su : PatLeaf<(i64immSExt32), [{
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@ -1380,7 +1384,7 @@ def MOV16ri : Ii16<0xB8, AddRegFrm, (outs GR16:$dst), (ins i16imm:$src),
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[(set GR16:$dst, imm:$src)], IIC_MOV>, OpSize16;
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def MOV32ri : Ii32<0xB8, AddRegFrm, (outs GR32:$dst), (ins i32imm:$src),
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"mov{l}\t{$src, $dst|$dst, $src}",
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[(set GR32:$dst, imm:$src)], IIC_MOV>, OpSize32;
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[(set GR32:$dst, relocImm:$src)], IIC_MOV>, OpSize32;
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def MOV64ri32 : RIi32S<0xC7, MRM0r, (outs GR64:$dst), (ins i64i32imm:$src),
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"mov{q}\t{$src, $dst|$dst, $src}",
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[(set GR64:$dst, i64immSExt32:$src)], IIC_MOV>;
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@ -1388,7 +1392,7 @@ def MOV64ri32 : RIi32S<0xC7, MRM0r, (outs GR64:$dst), (ins i64i32imm:$src),
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let isReMaterializable = 1 in {
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def MOV64ri : RIi64<0xB8, AddRegFrm, (outs GR64:$dst), (ins i64imm:$src),
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"movabs{q}\t{$src, $dst|$dst, $src}",
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[(set GR64:$dst, imm:$src)], IIC_MOV>;
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[(set GR64:$dst, relocImm:$src)], IIC_MOV>;
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}
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// Longer forms that use a ModR/M byte. Needed for disassembler
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22
test/CodeGen/X86/compare-global.ll
Normal file
22
test/CodeGen/X86/compare-global.ll
Normal file
@ -0,0 +1,22 @@
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; RUN: llc -o - %s | FileCheck %s
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target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
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target triple = "i686-pc-windows-msvc18.0.0"
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@foo = external global i8
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define void @f(i8* %c) {
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entry:
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; CHECK: subl $_foo, %eax
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%cmp = icmp eq i8* %c, @foo
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br i1 %cmp, label %if.then, label %if.end
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if.then:
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tail call void @g()
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br label %if.end
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if.end:
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ret void
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}
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declare void @g()
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@ -805,14 +805,9 @@ static unsigned getPatternSize(const TreePatternNode *P,
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if (P->isLeaf() && isa<IntInit>(P->getLeafValue()))
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Size += 2;
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// FIXME: This is a hack to statically increase the priority of patterns
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// which maps a sub-dag to a complex pattern. e.g. favors LEA over ADD.
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// Later we can allow complexity / cost for each pattern to be (optionally)
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// specified. To get best possible pattern match we'll need to dynamically
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// calculate the complexity of all patterns a dag can potentially map to.
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const ComplexPattern *AM = P->getComplexPatternInfo(CGP);
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if (AM) {
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Size += AM->getNumOperands() * 3;
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Size += AM->getComplexity();
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// We don't want to count any children twice, so return early.
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return Size;
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@ -393,6 +393,16 @@ ComplexPattern::ComplexPattern(Record *R) {
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SelectFunc = R->getValueAsString("SelectFunc");
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RootNodes = R->getValueAsListOfDefs("RootNodes");
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// FIXME: This is a hack to statically increase the priority of patterns which
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// maps a sub-dag to a complex pattern. e.g. favors LEA over ADD. To get best
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// possible pattern match we'll need to dynamically calculate the complexity
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// of all patterns a dag can potentially map to.
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int64_t RawComplexity = R->getValueAsInt("Complexity");
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if (RawComplexity == -1)
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Complexity = NumOperands * 3;
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else
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Complexity = RawComplexity;
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// Parse the properties.
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Properties = 0;
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std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
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@ -196,8 +196,8 @@ class ComplexPattern {
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std::string SelectFunc;
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std::vector<Record*> RootNodes;
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unsigned Properties; // Node properties
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unsigned Complexity;
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public:
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ComplexPattern() : NumOperands(0) {}
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ComplexPattern(Record *R);
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MVT::SimpleValueType getValueType() const { return Ty; }
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@ -207,6 +207,7 @@ public:
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return RootNodes;
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}
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bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
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unsigned getComplexity() const { return Complexity; }
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};
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} // End llvm namespace
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