mirror of
https://github.com/RPCS3/llvm.git
synced 2024-12-04 17:58:22 +00:00
* Removed extraneous #includes
* Fixed file headers to be consistent with the rest of LLVM * Other minor fixes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3278 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
179cdfb5c8
commit
035dfbe7f2
@ -1,14 +1,8 @@
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// $Id$ -*-c++-*-
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//***************************************************************************
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// File:
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// MachineFrameInfo.h
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//
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// Purpose:
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// Interface to layout of stack frame on target machine.
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//
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// History:
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// 11/6/01 - Vikram Adve - Created
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//**************************************************************************/
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//===-- llvm/CodeGen/MachineFrameInfo.h -------------------------*- C++ -*-===//
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//
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// Interface to layout of stack frame on target machine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_FRAMEINFO_H
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#define LLVM_CODEGEN_FRAMEINFO_H
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@ -16,22 +10,14 @@
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#include "Support/NonCopyable.h"
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#include <vector>
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//************************* Forward Declarations **************************/
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class MachineCodeForMethod;
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class TargetMachine;
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//*************************** External Classes ****************************/
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class MachineFrameInfo : public NonCopyableV {
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public:
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const TargetMachine& target;
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struct MachineFrameInfo : public NonCopyableV {
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const TargetMachine ⌖
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public:
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/*ctor*/ MachineFrameInfo(const TargetMachine& tgt) : target(tgt) {}
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MachineFrameInfo(const TargetMachine& tgt) : target(tgt) {}
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//
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// These methods provide constant parameters of the frame layout.
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@ -1,12 +1,5 @@
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// $Id$
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//---------------------------------------------------------------------------
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// File:
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// InstrForest.cpp
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//
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// Purpose:
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// Convert SSA graph to instruction trees for instruction selection.
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//
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// Strategy:
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//===-- InstrForest.cpp - Build instruction forest for inst selection -----===//
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//
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// The key goal is to group instructions into a single
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// tree if one or more of them might be potentially combined into a single
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// complex instruction in the target machine.
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@ -17,7 +10,7 @@
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// and (2) O and I are part of the same basic block,
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// and (3) O has only a single use, viz., I.
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//
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//---------------------------------------------------------------------------
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/InstrForest.h"
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#include "llvm/CodeGen/MachineCodeForInstruction.h"
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@ -28,8 +21,6 @@
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#include "llvm/Type.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "Support/STLExtras.h"
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#include <alloca.h>
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#include <iostream>
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using std::cerr;
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using std::vector;
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@ -127,10 +118,10 @@ InstructionNode::dumpNode(int indent) const
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const MachineCodeForInstruction &mvec =
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MachineCodeForInstruction::get(getInstruction());
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if (mvec.size() > 0)
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if (!mvec.empty())
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cerr << "\tMachine Instructions: ";
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for (unsigned int i=0; i < mvec.size(); ++i) {
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for (unsigned i = 0; i < mvec.size(); ++i) {
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mvec[i]->dump();
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if (i < mvec.size() - 1)
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cerr << "; ";
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//***************************************************************************
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// File:
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// InstrSelectionSupport.h
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//===-- InstrSelectionSupport.cpp -----------------------------------------===//
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//
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// Target-independent instruction selection code. See SparcInstrSelection.cpp
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// for usage.
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//
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// Purpose:
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// Target-independent instruction selection code.
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// See SparcInstrSelection.cpp for usage.
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//
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// History:
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// 10/10/01 - Vikram Adve - Created
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//**************************************************************************/
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/InstrSelectionSupport.h"
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#include "llvm/CodeGen/InstrSelection.h"
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@ -21,7 +16,6 @@
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#include "llvm/Target/MachineRegInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/Function.h"
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#include "llvm/BasicBlock.h"
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#include "llvm/Type.h"
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#include "llvm/iMemory.h"
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using std::vector;
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// $Id$
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//***************************************************************************
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// File:
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// MachineInstr.cpp
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//===-- MachineInstr.cpp --------------------------------------------------===//
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//
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// Purpose:
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//
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//
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// Strategy:
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//
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// History:
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// 7/2/01 - Vikram Adve - Created
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//**************************************************************************/
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Value.h"
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#include <iostream>
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using std::cerr;
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//************************ Class Implementations **************************/
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// Constructor for instructions with fixed #operands (nearly all)
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MachineInstr::MachineInstr(MachineOpCode _opCode,
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OpCodeMask _opCodeMask)
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// $Id$ -*-c++-*-
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//***************************************************************************
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// File:
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// MachineInstrAnnot.cpp
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//===-- MachineInstrAnnot.cpp ---------------------------------------------===//
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//
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// Purpose:
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// Annotations used to pass information between code generation phases.
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// This file defines Annotations used to pass information between code
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// generation phases.
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//
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// History:
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// 5/10/02 - Vikram Adve - Created
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//**************************************************************************/
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachineInstrAnnot.h"
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#include "llvm/Annotation.h"
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#include "llvm/iOther.h"
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#include <vector>
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AnnotationID CallArgsDescriptor::AID(AnnotationManager::
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getID("CodeGen::CallArgsDescriptor"));
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// $Id$
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//---------------------------------------------------------------------------
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// File:
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// InstrForest.cpp
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//
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// Purpose:
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// Convert SSA graph to instruction trees for instruction selection.
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//
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// Strategy:
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//===-- InstrForest.cpp - Build instruction forest for inst selection -----===//
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//
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// The key goal is to group instructions into a single
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// tree if one or more of them might be potentially combined into a single
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// complex instruction in the target machine.
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// and (2) O and I are part of the same basic block,
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// and (3) O has only a single use, viz., I.
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//
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//---------------------------------------------------------------------------
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/InstrForest.h"
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#include "llvm/CodeGen/MachineCodeForInstruction.h"
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@ -28,8 +21,6 @@
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#include "llvm/Type.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "Support/STLExtras.h"
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#include <alloca.h>
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#include <iostream>
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using std::cerr;
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using std::vector;
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@ -127,10 +118,10 @@ InstructionNode::dumpNode(int indent) const
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const MachineCodeForInstruction &mvec =
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MachineCodeForInstruction::get(getInstruction());
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if (mvec.size() > 0)
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if (!mvec.empty())
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cerr << "\tMachine Instructions: ";
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for (unsigned int i=0; i < mvec.size(); ++i) {
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for (unsigned i = 0; i < mvec.size(); ++i) {
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mvec[i]->dump();
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if (i < mvec.size() - 1)
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cerr << "; ";
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//***************************************************************************
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// File:
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// InstrSelectionSupport.h
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//===-- InstrSelectionSupport.cpp -----------------------------------------===//
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//
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// Target-independent instruction selection code. See SparcInstrSelection.cpp
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// for usage.
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//
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// Purpose:
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// Target-independent instruction selection code.
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// See SparcInstrSelection.cpp for usage.
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//
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// History:
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// 10/10/01 - Vikram Adve - Created
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//**************************************************************************/
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/InstrSelectionSupport.h"
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#include "llvm/CodeGen/InstrSelection.h"
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#include "llvm/Target/MachineRegInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/Function.h"
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#include "llvm/BasicBlock.h"
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#include "llvm/Type.h"
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#include "llvm/iMemory.h"
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using std::vector;
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//***************************************************************************
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// File:
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// SparcInstrInfo.cpp
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//
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// Purpose:
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//
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// History:
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// 10/15/01 - Vikram Adve - Created
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//**************************************************************************/
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//===-- SparcInstrInfo.cpp ------------------------------------------------===//
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//
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//===----------------------------------------------------------------------===//
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#include "SparcInternals.h"
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#include "SparcInstrSelectionSupport.h"
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#include "llvm/Target/Sparc.h"
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#include "llvm/CodeGen/InstrSelection.h"
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#include "llvm/CodeGen/InstrSelectionSupport.h"
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#include "llvm/CodeGen/MachineCodeForMethod.h"
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#include "llvm/CodeGen/MachineCodeForInstruction.h"
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#include "llvm/Function.h"
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#include "llvm/BasicBlock.h"
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#include "llvm/Instruction.h"
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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using std::vector;
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//************************ Internal Functions ******************************/
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static const uint32_t MAXLO = (1 << 10) - 1; // set bits set by %lo(*)
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static const uint32_t MAXSIMM = (1 << 12) - 1; // set bits in simm13 field of OR
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@ -33,7 +21,7 @@ static const uint32_t MAXSIMM = (1 << 12) - 1; // set bits in simm13 field of OR
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//
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static inline void
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CreateSETUWConst(const TargetMachine& target, uint32_t C,
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Instruction* dest, std::vector<MachineInstr*>& mvec)
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Instruction* dest, vector<MachineInstr*>& mvec)
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{
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MachineInstr *miSETHI = NULL, *miOR = NULL;
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@ -81,7 +69,7 @@ CreateSETUWConst(const TargetMachine& target, uint32_t C,
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// Not needed for SPARC v9 but useful to make the two SETX functions similar
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static inline void
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CreateSETUWLabel(const TargetMachine& target, Value* val,
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Instruction* dest, std::vector<MachineInstr*>& mvec)
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Instruction* dest, vector<MachineInstr*>& mvec)
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{
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MachineInstr* MI;
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@ -101,7 +89,7 @@ CreateSETUWLabel(const TargetMachine& target, Value* val,
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// with sign-extension to 64 bits.
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static inline void
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CreateSETSWConst(const TargetMachine& target, int32_t C,
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Instruction* dest, std::vector<MachineInstr*>& mvec)
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Instruction* dest, vector<MachineInstr*>& mvec)
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{
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MachineInstr* MI;
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@ -121,7 +109,7 @@ CreateSETSWConst(const TargetMachine& target, int32_t C,
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static inline void
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CreateSETXConst(const TargetMachine& target, uint64_t C,
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Instruction* tmpReg, Instruction* dest,
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std::vector<MachineInstr*>& mvec)
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vector<MachineInstr*>& mvec)
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{
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assert(C > (unsigned int) ~0 && "Use SETUW/SETSW for 32-bit values!");
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@ -147,7 +135,7 @@ CreateSETXConst(const TargetMachine& target, uint64_t C,
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static inline void
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CreateSETXLabel(const TargetMachine& target,
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Value* val, Instruction* tmpReg, Instruction* dest,
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std::vector<MachineInstr*>& mvec)
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vector<MachineInstr*>& mvec)
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{
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assert(isa<Constant>(val) || isa<GlobalValue>(val) &&
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"I only know about constant values and global addresses");
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@ -181,7 +169,7 @@ CreateSETXLabel(const TargetMachine& target,
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static inline void
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CreateIntSetInstruction(const TargetMachine& target,
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int64_t C, Instruction* dest,
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std::vector<MachineInstr*>& mvec,
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vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi)
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{
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assert(dest->getType()->isSigned() && "Use CreateUIntSetInstruction()");
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@ -201,7 +189,7 @@ CreateIntSetInstruction(const TargetMachine& target,
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static inline void
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CreateUIntSetInstruction(const TargetMachine& target,
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uint64_t C, Instruction* dest,
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std::vector<MachineInstr*>& mvec,
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vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi)
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{
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assert(! dest->getType()->isSigned() && "Use CreateIntSetInstruction()");
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@ -219,7 +207,7 @@ CreateUIntSetInstruction(const TargetMachine& target,
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}
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//************************* External Classes *******************************/
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//---------------------------------------------------------------------------
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// class UltraSparcInstrInfo
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@ -252,7 +240,7 @@ UltraSparcInstrInfo::CreateCodeToLoadConst(const TargetMachine& target,
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Function* F,
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Value* val,
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Instruction* dest,
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std::vector<MachineInstr*>& mvec,
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vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi) const
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{
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assert(isa<Constant>(val) || isa<GlobalValue>(val) &&
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@ -333,7 +321,7 @@ UltraSparcInstrInfo::CreateCodeToCopyIntToFloat(const TargetMachine& target,
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Function* F,
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Value* val,
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Instruction* dest,
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std::vector<MachineInstr*>& mvec,
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vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi) const
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{
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assert((val->getType()->isIntegral() || isa<PointerType>(val->getType()))
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@ -378,7 +366,7 @@ UltraSparcInstrInfo::CreateCodeToCopyFloatToInt(const TargetMachine& target,
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Function* F,
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Value* val,
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Instruction* dest,
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std::vector<MachineInstr*>& mvec,
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vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi) const
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{
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const Type* opTy = val->getType();
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// $Id$
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//***************************************************************************
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// File:
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// SparcInstrSelection.cpp
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//
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// Purpose:
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// BURS instruction selection for SPARC V9 architecture.
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//
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// History:
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// 7/02/01 - Vikram Adve - Created
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//**************************************************************************/
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//===-- SparcInstrSelection.cpp -------------------------------------------===//
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//
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// BURS instruction selection for SPARC V9 architecture.
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//
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//===----------------------------------------------------------------------===//
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#include "SparcInternals.h"
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#include "SparcInstrSelectionSupport.h"
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#include "llvm/iTerminators.h"
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#include "llvm/iMemory.h"
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#include "llvm/iOther.h"
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#include "llvm/BasicBlock.h"
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#include "llvm/Function.h"
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#include "llvm/Constants.h"
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#include "Support/MathExtras.h"
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// $Id$ -*-c++-*-
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//***************************************************************************
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// File:
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// SparcInstrSelectionSupport.h
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//
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// Purpose:
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//
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// History:
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// 10/17/01 - Vikram Adve - Created
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//**************************************************************************/
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//===-- llvm/CodeGen/SparcInstrSelectionSupport.h ---------------*- C++ -*-===//
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//
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//
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//
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//===----------------------------------------------------------------------===//
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#ifndef SPARC_INSTR_SELECTION_SUPPORT_h
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#define SPARC_INSTR_SELECTION_SUPPORT_h
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#include "llvm/DerivedTypes.h"
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#include "llvm/Value.h"
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inline MachineOpCode
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ChooseLoadInstruction(const Type *DestTy)
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@ -37,7 +31,6 @@ ChooseLoadInstruction(const Type *DestTy)
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return 0;
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}
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inline MachineOpCode
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ChooseStoreInstruction(const Type *DestTy)
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{
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@ -1,12 +1,9 @@
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//***************************************************************************
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// File:
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// SparcInternals.h
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//===-- SparcInternals.h ----------------------------------------*- C++ -*-===//
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//
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// Purpose:
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// This file defines stuff that is to be private to the Sparc
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// backend, but is shared among different portions of the backend.
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//**************************************************************************/
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// This file defines stuff that is to be private to the Sparc backend, but is
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// shared among different portions of the backend.
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//
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//===----------------------------------------------------------------------===//
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#ifndef SPARC_INTERNALS_H
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#define SPARC_INTERNALS_H
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@ -86,9 +83,8 @@ extern const MachineInstrDescriptor SparcMachineInstrDesc[];
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// default to member functions in base class MachineInstrInfo.
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//---------------------------------------------------------------------------
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class UltraSparcInstrInfo : public MachineInstrInfo {
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public:
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/*ctor*/ UltraSparcInstrInfo(const TargetMachine& tgt);
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struct UltraSparcInstrInfo : public MachineInstrInfo {
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UltraSparcInstrInfo(const TargetMachine& tgt);
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//
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// All immediate constants are in position 1 except the
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@ -18,8 +18,6 @@
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#include "llvm/CodeGen/InstrSelectionSupport.h"
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#include "llvm/Pass.h"
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#include "llvm/Function.h"
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#include "llvm/BasicBlock.h"
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#include "llvm/Instruction.h"
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|
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namespace {
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class InsertPrologEpilogCode : public FunctionPass {
|
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|
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Block a user