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LOAD COMPLEMENT instruction is not really two-addr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76031 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -69,18 +69,19 @@ def FMOV64mry : Pseudo<(outs), (ins rriaddr:$dst, FP64:$src),
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// Arithmetic Instructions
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// Arithmetic Instructions
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let isTwoAddress = 1 in {
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let Defs = [PSW] in {
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let Defs = [PSW] in {
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def FNEG32rr : Pseudo<(outs FP32:$dst), (ins FP32:$src),
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def FNEG32rr : Pseudo<(outs FP32:$dst), (ins FP32:$src),
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"lcebr\t{$dst}",
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"lcebr\t{$dst, $src}",
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[(set FP32:$dst, (fneg FP32:$src)),
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[(set FP32:$dst, (fneg FP32:$src)),
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(implicit PSW)]>;
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(implicit PSW)]>;
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def FNEG64rr : Pseudo<(outs FP64:$dst), (ins FP64:$src),
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def FNEG64rr : Pseudo<(outs FP64:$dst), (ins FP64:$src),
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"lcdbr\t{$dst}",
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"lcdbr\t{$dst, $src}",
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[(set FP64:$dst, (fneg FP64:$src)),
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[(set FP64:$dst, (fneg FP64:$src)),
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(implicit PSW)]>;
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(implicit PSW)]>;
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}
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let isTwoAddress = 1 in {
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let Defs = [PSW] in {
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// FIXME: Add peephole for fneg(fabs) => load negative
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// FIXME: Add peephole for fneg(fabs) => load negative
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def FABS32rr : Pseudo<(outs FP32:$dst), (ins FP32:$src),
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def FABS32rr : Pseudo<(outs FP32:$dst), (ins FP32:$src),
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