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Teach the code generator that rlwimi is commutable if the rotate amount

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is zero.  This lets the register allocator elide some copies in some cases.

This implements CodeGen/PowerPC/rlwimi-commute.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23292 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-09-09 18:17:41 +00:00
parent ed628ce7bf
commit 043870dd85
3 changed files with 38 additions and 1 deletions
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32
lib/Target/PowerPC/PPCInstrInfo.cpp
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@ -76,3 +76,35 @@ bool PPC32InstrInfo::isMoveInstr(const MachineInstr& MI,
}
return false;
}
// commuteInstruction - We can commute rlwimi instructions, but only if the
// rotate amt is zero. We also have to munge the immediates a bit.
MachineInstr *PPC32InstrInfo::commuteInstruction(MachineInstr *MI) const {
// Normal instructions can be commuted the obvious way.
if (MI->getOpcode() != PPC::RLWIMI)
return TargetInstrInfo::commuteInstruction(MI);
// Cannot commute if it has a non-zero rotate count.
if (MI->getOperand(3).getImmedValue() != 0)
return 0;
// If we have a zero rotate count, we have:
// M = mask(MB,ME)
// Op0 = (Op1 & ~M) | (Op2 & M)
// Change this to:
// M = mask((ME+1)&31, (MB-1)&31)
// Op0 = (Op2 & ~M) | (Op1 & M)
// Swap op1/op2
unsigned Reg1 = MI->getOperand(1).getReg();
unsigned Reg2 = MI->getOperand(2).getReg();
MI->SetMachineOperandReg(2, Reg1);
MI->SetMachineOperandReg(1, Reg2);
// Swap the mask around.
unsigned MB = MI->getOperand(4).getImmedValue();
unsigned ME = MI->getOperand(5).getImmedValue();
MI->getOperand(4).setImmedValue((ME+1) & 31);
MI->getOperand(5).setImmedValue((MB-1) & 31);
return MI;
}

4
lib/Target/PowerPC/PPCInstrInfo.h
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@ -38,6 +38,10 @@ public:
unsigned& sourceReg,
unsigned& destReg) const;
// commuteInstruction - We can commute rlwimi instructions, but only if the
// rotate amt is zero. We also have to munge the immediates a bit.
virtual MachineInstr *commuteInstruction(MachineInstr *MI) const;
static unsigned invertPPCBranchOpcode(unsigned Opcode) {
switch (Opcode) {
default: assert(0 && "Unknown PPC branch opcode!");

3
lib/Target/PowerPC/PPCInstrInfo.td
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@ -733,7 +733,8 @@ def FSUBS : AForm_2<59, 20,
// M-Form instructions. rotate and mask instructions.
//
let isTwoAddress = 1 in {
let isTwoAddress = 1, isCommutable = 1 in {
// RLWIMI can be commuted if the rotate amount is zero.
def RLWIMI : MForm_2<20,
(ops GPRC:$rA, GPRC:$rSi, GPRC:$rS, u5imm:$SH, u5imm:$MB,
u5imm:$ME), "rlwimi $rA, $rS, $SH, $MB, $ME">;