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Folding into CSEL when there is ZEXT between SETCC and ADD
Normally, patterns like (add x, (setcc cc ...)) will be folded into (csel x, x+1, not cc). However, if there is a ZEXT after SETCC, they won't be folded. This patch recognizes the ZEXT and allows the generation of CSINC. This patch fixes bug 19680. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208660 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -6600,8 +6600,16 @@ static bool isSetCC(SDValue Op, SetCCInfoAndKind &SetCCInfo) {
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return TValue->isOne() && FValue->isNullValue();
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}
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// Returns true if Op is setcc or zext of setcc.
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static bool isSetCCOrZExtSetCC(const SDValue& Op, SetCCInfoAndKind &Info) {
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if (isSetCC(Op, Info))
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return true;
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return ((Op.getOpcode() == ISD::ZERO_EXTEND) &&
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isSetCC(Op->getOperand(0), Info));
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}
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// The folding we want to perform is:
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// (add x, (setcc cc ...) )
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// (add x, [zext] (setcc cc ...) )
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// -->
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// (csel x, (add x, 1), !cc ...)
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//
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@ -6613,9 +6621,9 @@ static SDValue performSetccAddFolding(SDNode *Op, SelectionDAG &DAG) {
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SetCCInfoAndKind InfoAndKind;
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// If neither operand is a SET_CC, give up.
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if (!isSetCC(LHS, InfoAndKind)) {
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if (!isSetCCOrZExtSetCC(LHS, InfoAndKind)) {
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std::swap(LHS, RHS);
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if (!isSetCC(LHS, InfoAndKind))
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if (!isSetCCOrZExtSetCC(LHS, InfoAndKind))
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return SDValue();
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}
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@ -217,3 +217,14 @@ entry:
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%. = select i1 %cmp, i64 1, i64 2
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ret i64 %.
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}
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define i64 @foo19(i64 %a, i64 %b, i64 %c) {
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entry:
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; CHECK-LABEL: foo19:
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; CHECK: cinc x0, x2
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; CHECK-NOT: add
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%cmp = icmp ult i64 %a, %b
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%inc = zext i1 %cmp to i64
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%inc.c = add i64 %inc, %c
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ret i64 %inc.c
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}
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