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Rename tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281863 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -19,8 +19,8 @@ declare double @llvm.sqrt.f64(double)
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; SQRT
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;
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define void @fma_2f64() #0 {
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; CHECK-LABEL: @fma_2f64(
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define void @sqrt_2f64() #0 {
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; CHECK-LABEL: @sqrt_2f64(
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; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, <2 x double>* bitcast ([8 x double]* @src64 to <2 x double>*), align 8
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; CHECK-NEXT: [[TMP2:%.*]] = call <2 x double> @llvm.sqrt.v2f64(<2 x double> [[TMP1]])
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; CHECK-NEXT: store <2 x double> [[TMP2]], <2 x double>* bitcast ([8 x double]* @dst64 to <2 x double>*), align 8
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@ -35,8 +35,8 @@ define void @fma_2f64() #0 {
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ret void
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}
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define void @fma_4f64() #0 {
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; SSE-LABEL: @fma_4f64(
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define void @sqrt_4f64() #0 {
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; SSE-LABEL: @sqrt_4f64(
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; SSE-NEXT: [[TMP1:%.*]] = load <2 x double>, <2 x double>* bitcast ([8 x double]* @src64 to <2 x double>*), align 8
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; SSE-NEXT: [[TMP2:%.*]] = load <2 x double>, <2 x double>* bitcast (double* getelementptr inbounds ([8 x double], [8 x double]* @src64, i32 0, i64 2) to <2 x double>*), align 8
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; SSE-NEXT: [[TMP3:%.*]] = call <2 x double> @llvm.sqrt.v2f64(<2 x double> [[TMP1]])
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@ -45,7 +45,7 @@ define void @fma_4f64() #0 {
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; SSE-NEXT: store <2 x double> [[TMP4]], <2 x double>* bitcast (double* getelementptr inbounds ([8 x double], [8 x double]* @dst64, i32 0, i64 2) to <2 x double>*), align 8
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; SSE-NEXT: ret void
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;
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; AVX-LABEL: @fma_4f64(
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; AVX-LABEL: @sqrt_4f64(
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; AVX-NEXT: [[TMP1:%.*]] = load <4 x double>, <4 x double>* bitcast ([8 x double]* @src64 to <4 x double>*), align 8
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; AVX-NEXT: [[TMP2:%.*]] = call <4 x double> @llvm.sqrt.v4f64(<4 x double> [[TMP1]])
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; AVX-NEXT: store <4 x double> [[TMP2]], <4 x double>* bitcast ([8 x double]* @dst64 to <4 x double>*), align 8
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@ -66,8 +66,8 @@ define void @fma_4f64() #0 {
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ret void
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}
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define void @fma_8f64() #0 {
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; SSE-LABEL: @fma_8f64(
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define void @sqrt_8f64() #0 {
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; SSE-LABEL: @sqrt_8f64(
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; SSE-NEXT: [[TMP1:%.*]] = load <2 x double>, <2 x double>* bitcast ([8 x double]* @src64 to <2 x double>*), align 4
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; SSE-NEXT: [[TMP2:%.*]] = load <2 x double>, <2 x double>* bitcast (double* getelementptr inbounds ([8 x double], [8 x double]* @src64, i32 0, i64 2) to <2 x double>*), align 4
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; SSE-NEXT: [[TMP3:%.*]] = load <2 x double>, <2 x double>* bitcast (double* getelementptr inbounds ([8 x double], [8 x double]* @src64, i32 0, i64 4) to <2 x double>*), align 4
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@ -82,7 +82,7 @@ define void @fma_8f64() #0 {
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; SSE-NEXT: store <2 x double> [[TMP8]], <2 x double>* bitcast (double* getelementptr inbounds ([8 x double], [8 x double]* @dst64, i32 0, i64 6) to <2 x double>*), align 4
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; SSE-NEXT: ret void
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;
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; AVX256-LABEL: @fma_8f64(
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; AVX256-LABEL: @sqrt_8f64(
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; AVX256-NEXT: [[TMP1:%.*]] = load <4 x double>, <4 x double>* bitcast ([8 x double]* @src64 to <4 x double>*), align 4
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; AVX256-NEXT: [[TMP2:%.*]] = load <4 x double>, <4 x double>* bitcast (double* getelementptr inbounds ([8 x double], [8 x double]* @src64, i32 0, i64 4) to <4 x double>*), align 4
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; AVX256-NEXT: [[TMP3:%.*]] = call <4 x double> @llvm.sqrt.v4f64(<4 x double> [[TMP1]])
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@ -91,7 +91,7 @@ define void @fma_8f64() #0 {
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; AVX256-NEXT: store <4 x double> [[TMP4]], <4 x double>* bitcast (double* getelementptr inbounds ([8 x double], [8 x double]* @dst64, i32 0, i64 4) to <4 x double>*), align 4
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; AVX256-NEXT: ret void
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;
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; AVX512-LABEL: @fma_8f64(
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; AVX512-LABEL: @sqrt_8f64(
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; AVX512-NEXT: [[TMP1:%.*]] = load <8 x double>, <8 x double>* bitcast ([8 x double]* @src64 to <8 x double>*), align 4
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; AVX512-NEXT: [[TMP2:%.*]] = call <8 x double> @llvm.sqrt.v8f64(<8 x double> [[TMP1]])
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; AVX512-NEXT: store <8 x double> [[TMP2]], <8 x double>* bitcast ([8 x double]* @dst64 to <8 x double>*), align 4
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@ -124,8 +124,8 @@ define void @fma_8f64() #0 {
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ret void
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}
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define void @fma_4f32() #0 {
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; CHECK-LABEL: @fma_4f32(
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define void @sqrt_4f32() #0 {
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; CHECK-LABEL: @sqrt_4f32(
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; CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, <4 x float>* bitcast ([16 x float]* @src32 to <4 x float>*), align 4
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; CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.sqrt.v4f32(<4 x float> [[TMP1]])
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; CHECK-NEXT: store <4 x float> [[TMP2]], <4 x float>* bitcast ([16 x float]* @dst32 to <4 x float>*), align 4
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@ -146,8 +146,8 @@ define void @fma_4f32() #0 {
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ret void
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}
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define void @fma_8f32() #0 {
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; SSE-LABEL: @fma_8f32(
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define void @sqrt_8f32() #0 {
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; SSE-LABEL: @sqrt_8f32(
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; SSE-NEXT: [[TMP1:%.*]] = load <4 x float>, <4 x float>* bitcast ([16 x float]* @src32 to <4 x float>*), align 4
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; SSE-NEXT: [[TMP2:%.*]] = load <4 x float>, <4 x float>* bitcast (float* getelementptr inbounds ([16 x float], [16 x float]* @src32, i32 0, i64 4) to <4 x float>*), align 4
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; SSE-NEXT: [[TMP3:%.*]] = call <4 x float> @llvm.sqrt.v4f32(<4 x float> [[TMP1]])
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@ -156,7 +156,7 @@ define void @fma_8f32() #0 {
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; SSE-NEXT: store <4 x float> [[TMP4]], <4 x float>* bitcast (float* getelementptr inbounds ([16 x float], [16 x float]* @dst32, i32 0, i64 4) to <4 x float>*), align 4
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; SSE-NEXT: ret void
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;
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; AVX-LABEL: @fma_8f32(
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; AVX-LABEL: @sqrt_8f32(
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; AVX-NEXT: [[TMP1:%.*]] = load <8 x float>, <8 x float>* bitcast ([16 x float]* @src32 to <8 x float>*), align 4
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; AVX-NEXT: [[TMP2:%.*]] = call <8 x float> @llvm.sqrt.v8f32(<8 x float> [[TMP1]])
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; AVX-NEXT: store <8 x float> [[TMP2]], <8 x float>* bitcast ([16 x float]* @dst32 to <8 x float>*), align 4
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@ -189,8 +189,8 @@ define void @fma_8f32() #0 {
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ret void
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}
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define void @fma_16f32() #0 {
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; SSE-LABEL: @fma_16f32(
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define void @sqrt_16f32() #0 {
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; SSE-LABEL: @sqrt_16f32(
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; SSE-NEXT: [[TMP1:%.*]] = load <4 x float>, <4 x float>* bitcast ([16 x float]* @src32 to <4 x float>*), align 4
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; SSE-NEXT: [[TMP2:%.*]] = load <4 x float>, <4 x float>* bitcast (float* getelementptr inbounds ([16 x float], [16 x float]* @src32, i32 0, i64 4) to <4 x float>*), align 4
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; SSE-NEXT: [[TMP3:%.*]] = load <4 x float>, <4 x float>* bitcast (float* getelementptr inbounds ([16 x float], [16 x float]* @src32, i32 0, i64 8) to <4 x float>*), align 4
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@ -205,7 +205,7 @@ define void @fma_16f32() #0 {
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; SSE-NEXT: store <4 x float> [[TMP8]], <4 x float>* bitcast (float* getelementptr inbounds ([16 x float], [16 x float]* @dst32, i32 0, i64 12) to <4 x float>*), align 4
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; SSE-NEXT: ret void
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;
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; AVX256-LABEL: @fma_16f32(
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; AVX256-LABEL: @sqrt_16f32(
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; AVX256-NEXT: [[TMP1:%.*]] = load <8 x float>, <8 x float>* bitcast ([16 x float]* @src32 to <8 x float>*), align 4
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; AVX256-NEXT: [[TMP2:%.*]] = load <8 x float>, <8 x float>* bitcast (float* getelementptr inbounds ([16 x float], [16 x float]* @src32, i32 0, i64 8) to <8 x float>*), align 4
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; AVX256-NEXT: [[TMP3:%.*]] = call <8 x float> @llvm.sqrt.v8f32(<8 x float> [[TMP1]])
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@ -214,7 +214,7 @@ define void @fma_16f32() #0 {
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; AVX256-NEXT: store <8 x float> [[TMP4]], <8 x float>* bitcast (float* getelementptr inbounds ([16 x float], [16 x float]* @dst32, i32 0, i64 8) to <8 x float>*), align 4
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; AVX256-NEXT: ret void
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;
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; AVX512-LABEL: @fma_16f32(
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; AVX512-LABEL: @sqrt_16f32(
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; AVX512-NEXT: [[TMP1:%.*]] = load <16 x float>, <16 x float>* bitcast ([16 x float]* @src32 to <16 x float>*), align 4
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; AVX512-NEXT: [[TMP2:%.*]] = call <16 x float> @llvm.sqrt.v16f32(<16 x float> [[TMP1]])
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; AVX512-NEXT: store <16 x float> [[TMP2]], <16 x float>* bitcast ([16 x float]* @dst32 to <16 x float>*), align 4
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