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Set SchedulingForLatency to be the default scheduling preference for all.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25607 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2006-01-25 18:52:42 +00:00
parent acc398c195
commit 0577a22c67
5 changed files with 1 additions and 4 deletions
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1
lib/CodeGen/SelectionDAG/TargetLowering.cpp
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@ -32,6 +32,7 @@ TargetLowering::TargetLowering(TargetMachine &tm)
UseUnderscoreSetJmpLongJmp = false;
IntDivIsCheap = false;
Pow2DivIsCheap = false;
SchedPreferenceInfo = SchedulingForLatency;
}
TargetLowering::~TargetLowering() {}

1
lib/Target/IA64/IA64ISelLowering.cpp
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@ -100,7 +100,6 @@ IA64TargetLowering::IA64TargetLowering(TargetMachine &TM)
setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand);
setSchedulingPreference(SchedulingForLatency);
setStackPointerRegisterToSaveRestore(IA64::r12);
computeRegisterProperties();

1
lib/Target/PowerPC/PPCISelLowering.cpp
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@ -150,7 +150,6 @@ PPCTargetLowering::PPCTargetLowering(TargetMachine &TM)
}
setSetCCResultContents(ZeroOrOneSetCCResult);
setSchedulingPreference(SchedulingForLatency);
setStackPointerRegisterToSaveRestore(PPC::R1);
computeRegisterProperties();

1
lib/Target/Sparc/SparcISelDAGToDAG.cpp
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@ -167,7 +167,6 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
setOperationAction(ISD::STACKRESTORE , MVT::Other, Expand);
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
setSchedulingPreference(SchedulingForLatency);
setStackPointerRegisterToSaveRestore(V8::O6);
computeRegisterProperties();

1
lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
View File

@ -167,7 +167,6 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
setOperationAction(ISD::STACKRESTORE , MVT::Other, Expand);
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
setSchedulingPreference(SchedulingForLatency);
setStackPointerRegisterToSaveRestore(V8::O6);
computeRegisterProperties();