Revert r162034, r162035 and r162037.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162039 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/Object/ELF.h

@@ -2015,8 +2015,6 @@ StringRef ELFObjectFile<target_endianness, is64Bits>
       return "ELF32-arm";
     case ELF::EM_HEXAGON:
       return "ELF32-hexagon";
-    case ELF::EM_PPC:
-      return "ELF32-ppc";
     default:
       return "ELF32-unknown";
     }
@@ -2026,8 +2024,6 @@ StringRef ELFObjectFile<target_endianness, is64Bits>
       return "ELF64-i386";
     case ELF::EM_X86_64:
       return "ELF64-x86-64";
-    case ELF::EM_PPC64:
-      return "ELF64-ppc64";
     default:
       return "ELF64-unknown";
     }
@@ -2048,10 +2044,6 @@ unsigned ELFObjectFile<target_endianness, is64Bits>::getArch() const {
     return Triple::arm;
   case ELF::EM_HEXAGON:
     return Triple::hexagon;
-  case ELF::EM_PPC:
-    return Triple::ppc;
-  case ELF::EM_PPC64:
-    return Triple::ppc64;
   default:
     return Triple::UnknownArch;
   }

include/llvm/Support/ELF.h

@@ -441,7 +441,6 @@ enum {
   R_MICROBLAZE_COPY           = 21
 };
 
-// ELF Relocation types for PPC32
 enum {
   R_PPC_NONE                  = 0,      /* No relocation. */
   R_PPC_ADDR32                = 1,
@@ -460,21 +459,6 @@ enum {
   R_PPC_REL32                 = 26
 };
 
-// ELF Relocation types for PPC64
-enum {
-  R_PPC64_ADDR16_LO           = 4,
-  R_PPC64_ADDR16_HA           = 6,
-  R_PPC64_ADDR14              = 7,
-  R_PPC64_REL24               = 10,
-  R_PPC64_ADDR64              = 38,
-  R_PPC64_TOC16               = 47,
-  R_PPC64_TOC16_LO            = 48,
-  R_PPC64_TOC16_HI            = 49,
-  R_PPC64_TOC16_HA            = 50,
-  R_PPC64_TOC                 = 51,
-  R_PPC64_TOC16_DS            = 63
-};
-
 // ARM Specific e_flags
 enum { EF_ARM_EABIMASK = 0xFF000000U };
 

lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp

@@ -29,12 +29,7 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
   case FK_Data_1:
   case FK_Data_2:
   case FK_Data_4:
-  case FK_Data_8:
-  case PPC::fixup_ppc_toc:
     return Value;
-  case PPC::fixup_ppc_lo14:
-  case PPC::fixup_ppc_toc16_ds:
-    return (Value & 0xffff) >> 2;
   case PPC::fixup_ppc_brcond14:
     return Value & 0x3ffc;
   case PPC::fixup_ppc_br24:
@@ -45,7 +40,6 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
 #endif
   case PPC::fixup_ppc_ha16:
     return ((Value >> 16) + ((Value & 0x8000) ? 1 : 0)) & 0xffff;
-  case PPC::fixup_ppc_toc16:
   case PPC::fixup_ppc_lo16:
     return Value & 0xffff;
   }
@@ -78,10 +72,7 @@ public:
       { "fixup_ppc_brcond14",    16,     14,   MCFixupKindInfo::FKF_IsPCRel },
       { "fixup_ppc_lo16",        16,     16,   0 },
       { "fixup_ppc_ha16",        16,     16,   0 },
-      { "fixup_ppc_lo14",        16,     14,   0 },
+      { "fixup_ppc_lo14",        16,     14,   0 }
-      { "fixup_ppc_toc",          0,     64,   0 },
-      { "fixup_ppc_toc16",       16,     16,   0 },
-      { "fixup_ppc_toc16_ds",    16,     14,   0 }
     };
 
     if (Kind < FirstTargetFixupKind)

lib/Target/PowerPC/MCTargetDesc/PPCFixupKinds.h

@@ -34,16 +34,6 @@ enum Fixups {
   /// fixup_ppc_lo14 - A 14-bit fixup corresponding to lo16(_foo) for instrs
   /// like 'std'.
   fixup_ppc_lo14,
-
-  /// fixup_ppc_toc - Insert value of TOC base (.TOC.).
-  fixup_ppc_toc,
-
-  /// fixup_ppc_toc16 - A 16-bit signed fixup relative to the TOC base.
-  fixup_ppc_toc16,
-
-  /// fixup_ppc_toc16_ds - A 14-bit signed fixup relative to the TOC base with
-  /// implied 2 zero bits.
-  fixup_ppc_toc16_ds,
   
   // Marker
   LastTargetFixupKind,