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Fix typo in test - it should be masking bits0-15 not bit16

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280816 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Pilgrim 2016-09-07 15:19:07 +00:00
parent 959abb8a67
commit 0639c00041
1 changed files with 1 additions and 1 deletions
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test/CodeGen/X86/combine-or.ll
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@ -462,7 +462,7 @@ define <4 x i32> @or_zext_v4i16(<4 x i16> %a0) {
; CHECK-NEXT: por {{.*}}(%rip), %xmm0
; CHECK-NEXT: retq
%1 = zext <4 x i16> %a0 to <4 x i32>
%2 = or <4 x i32> %1, <i32 65536, i32 65536, i32 65536, i32 65536>
%2 = or <4 x i32> %1, <i32 65535, i32 65535, i32 65535, i32 65535>
ret <4 x i32> %2
}