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Revert r301040 "X86: Don't emit zero-byte functions on Windows"
This broke almost all bots. Reverting while fixing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301041 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1108,7 +1108,7 @@ public:
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/// Return the noop instruction to use for a noop.
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virtual void getNoop(MCInst &NopInst) const;
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virtual void getNoopForMachoTarget(MCInst &NopInst) const;
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/// Return true for post-incremented instructions.
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virtual bool isPostIncrement(const MachineInstr &MI) const {
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@ -1046,17 +1046,15 @@ void AsmPrinter::EmitFunctionBody() {
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// If the function is empty and the object file uses .subsections_via_symbols,
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// then we need to emit *something* to the function body to prevent the
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// labels from collapsing together. Just emit a noop.
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// Similarly, don't emit empty functions on Windows either. It can lead to
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// duplicate entries (two functions with the same RVA) in the Guard CF Table
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// after linking, causing the kernel not to load the binary:
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// https://developercommunity.visualstudio.com/content/problem/45366/vc-linker-creates-invalid-dll-with-clang-cl.html
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// FIXME: Hide this behind some API in e.g. MCAsmInfo or MCTargetStreamer.
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if (!HasAnyRealCode &&
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(MAI->hasSubsectionsViaSymbols() || TM.getTargetTriple().isOSWindows())) {
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if ((MAI->hasSubsectionsViaSymbols() && !HasAnyRealCode)) {
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MCInst Noop;
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MF->getSubtarget().getInstrInfo()->getNoop(Noop);
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MF->getSubtarget().getInstrInfo()->getNoopForMachoTarget(Noop);
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OutStreamer->AddComment("avoids zero-length function");
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OutStreamer->EmitInstruction(Noop, getSubtargetInfo());
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// Targets can opt-out of emitting the noop here by leaving the opcode
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// unspecified.
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if (Noop.getOpcode())
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OutStreamer->EmitInstruction(Noop, getSubtargetInfo());
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}
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const Function *F = MF->getFunction();
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@ -428,8 +428,8 @@ static const TargetRegisterClass *canFoldCopy(const MachineInstr &MI,
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return nullptr;
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}
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void TargetInstrInfo::getNoop(MCInst &NopInst) const {
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llvm_unreachable("Not implemented");
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void TargetInstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
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llvm_unreachable("Not a MachO target");
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}
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static MachineInstr *foldPatchpoint(MachineFunction &MF, MachineInstr &MI,
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@ -3025,7 +3025,7 @@ bool llvm::rewriteAArch64FrameIndex(MachineInstr &MI, unsigned FrameRegIdx,
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return false;
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}
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void AArch64InstrInfo::getNoop(MCInst &NopInst) const {
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void AArch64InstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
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NopInst.setOpcode(AArch64::HINT);
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NopInst.addOperand(MCOperand::createImm(0));
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}
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@ -205,7 +205,7 @@ public:
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const DebugLoc &DL, unsigned DstReg,
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ArrayRef<MachineOperand> Cond, unsigned TrueReg,
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unsigned FalseReg) const override;
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void getNoop(MCInst &NopInst) const override;
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void getNoopForMachoTarget(MCInst &NopInst) const override;
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/// analyzeCompare - For a comparison instruction, return the source registers
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/// in SrcReg and SrcReg2, and the value it compares against in CmpValue.
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@ -105,6 +105,10 @@ public:
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// Return whether the target has an explicit NOP encoding.
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bool hasNOP() const;
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virtual void getNoopForElfTarget(MCInst &NopInst) const {
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getNoopForMachoTarget(NopInst);
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}
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// Return the non-pre/post incrementing version of 'Opc'. Return 0
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// if there is not such an opcode.
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virtual unsigned getUnindexedOpcode(unsigned Opc) const = 0;
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@ -32,8 +32,8 @@ using namespace llvm;
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ARMInstrInfo::ARMInstrInfo(const ARMSubtarget &STI)
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: ARMBaseInstrInfo(STI), RI() {}
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/// Return the noop instruction to use for a noop.
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void ARMInstrInfo::getNoop(MCInst &NopInst) const {
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/// getNoopForMachoTarget - Return the noop instruction to use for a noop.
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void ARMInstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
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if (hasNOP()) {
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NopInst.setOpcode(ARM::HINT);
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NopInst.addOperand(MCOperand::createImm(0));
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@ -25,8 +25,8 @@ class ARMInstrInfo : public ARMBaseInstrInfo {
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public:
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explicit ARMInstrInfo(const ARMSubtarget &STI);
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/// Return the noop instruction to use for a noop.
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void getNoop(MCInst &NopInst) const override;
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/// getNoopForMachoTarget - Return the noop instruction to use for a noop.
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void getNoopForMachoTarget(MCInst &NopInst) const override;
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// Return the non-pre/post incrementing version of 'Opc'. Return 0
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// if there is not such an opcode.
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@ -211,9 +211,11 @@ void ARMAsmPrinter::EmitSled(const MachineInstr &MI, SledKind Kind)
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.addImm(ARMCC::AL).addReg(0));
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MCInst Noop;
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Subtarget->getInstrInfo()->getNoop(Noop);
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Subtarget->getInstrInfo()->getNoopForElfTarget(Noop);
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for (int8_t I = 0; I < NoopsInSledCount; I++)
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{
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OutStreamer->EmitInstruction(Noop, getSubtargetInfo());
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}
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OutStreamer->EmitLabel(Target);
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recordSled(CurSled, MI, Kind);
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@ -24,8 +24,8 @@ using namespace llvm;
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Thumb1InstrInfo::Thumb1InstrInfo(const ARMSubtarget &STI)
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: ARMBaseInstrInfo(STI), RI() {}
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/// Return the noop instruction to use for a noop.
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void Thumb1InstrInfo::getNoop(MCInst &NopInst) const {
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/// getNoopForMachoTarget - Return the noop instruction to use for a noop.
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void Thumb1InstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
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NopInst.setOpcode(ARM::tMOVr);
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NopInst.addOperand(MCOperand::createReg(ARM::R8));
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NopInst.addOperand(MCOperand::createReg(ARM::R8));
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@ -25,8 +25,8 @@ class Thumb1InstrInfo : public ARMBaseInstrInfo {
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public:
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explicit Thumb1InstrInfo(const ARMSubtarget &STI);
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/// Return the noop instruction to use for a noop.
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void getNoop(MCInst &NopInst) const override;
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/// getNoopForMachoTarget - Return the noop instruction to use for a noop.
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void getNoopForMachoTarget(MCInst &NopInst) const override;
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// Return the non-pre/post incrementing version of 'Opc'. Return 0
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// if there is not such an opcode.
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@ -32,8 +32,8 @@ OldT2IfCvt("old-thumb2-ifcvt", cl::Hidden,
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Thumb2InstrInfo::Thumb2InstrInfo(const ARMSubtarget &STI)
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: ARMBaseInstrInfo(STI), RI() {}
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/// Return the noop instruction to use for a noop.
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void Thumb2InstrInfo::getNoop(MCInst &NopInst) const {
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/// getNoopForMachoTarget - Return the noop instruction to use for a noop.
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void Thumb2InstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
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NopInst.setOpcode(ARM::tHINT);
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NopInst.addOperand(MCOperand::createImm(0));
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NopInst.addOperand(MCOperand::createImm(ARMCC::AL));
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@ -26,8 +26,8 @@ class Thumb2InstrInfo : public ARMBaseInstrInfo {
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public:
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explicit Thumb2InstrInfo(const ARMSubtarget &STI);
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/// Return the noop instruction to use for a noop.
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void getNoop(MCInst &NopInst) const override;
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/// getNoopForMachoTarget - Return the noop instruction to use for a noop.
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void getNoopForMachoTarget(MCInst &NopInst) const override;
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// Return the non-pre/post incrementing version of 'Opc'. Return 0
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// if there is not such an opcode.
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@ -440,8 +440,8 @@ void PPCInstrInfo::insertNoop(MachineBasicBlock &MBB,
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BuildMI(MBB, MI, DL, get(Opcode));
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}
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/// Return the noop instruction to use for a noop.
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void PPCInstrInfo::getNoop(MCInst &NopInst) const {
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/// getNoopForMachoTarget - Return the noop instruction to use for a noop.
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void PPCInstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
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NopInst.setOpcode(PPC::NOP);
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}
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@ -269,7 +269,7 @@ public:
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///
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unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
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void getNoop(MCInst &NopInst) const override;
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void getNoopForMachoTarget(MCInst &NopInst) const override;
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std::pair<unsigned, unsigned>
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decomposeMachineOperandsTargetFlags(unsigned TF) const override;
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@ -9514,7 +9514,7 @@ void X86InstrInfo::setExecutionDomain(MachineInstr &MI, unsigned Domain) const {
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}
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/// Return the noop instruction to use for a noop.
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void X86InstrInfo::getNoop(MCInst &NopInst) const {
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void X86InstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
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NopInst.setOpcode(X86::NOOP);
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}
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@ -457,7 +457,7 @@ public:
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int64_t Offset1, int64_t Offset2,
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unsigned NumLoads) const override;
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void getNoop(MCInst &NopInst) const override;
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void getNoopForMachoTarget(MCInst &NopInst) const override;
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bool
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reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
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@ -1,22 +0,0 @@
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; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck -check-prefix=CHECK -check-prefix=WIN32 %s
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; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=CHECK -check-prefix=WIN64 %s
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; RUN: llc < %s -mtriple=i386-linux-gnu | FileCheck -check-prefix=LINUX %s
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target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
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target triple = "i686-pc-windows-msvc18.0.0"
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; Don't emit empty functions on Windows; it can lead to duplicate entries
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; (multiple functions sharing the same RVA) in the Guard CF Function Table which
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; the kernel refuses to load.
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define void @f() {
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entry:
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unreachable
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; CHECK-LABEL: f:
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; WIN32: nop
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; WIN64: ud2
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; LINUX-NOT: nop
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; LINUX-NOT: ud2
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}
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