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MC: Separate creating a generic object writer from creating a target object writer. NFCI.

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With this we gain a little flexibility in how the generic object
writer is created.

Part of PR37466.

Differential Revision: https://reviews.llvm.org/D47045

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332868 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Peter Collingbourne 2018-05-21 19:20:29 +00:00
parent 815bbef5d2
commit 09ac21d393
65 changed files with 296 additions and 313 deletions
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8
include/llvm/MC/MCAsmBackend.h
View File

@ -30,6 +30,7 @@ struct MCFixupKindInfo;
class MCFragment;
class MCInst;
class MCObjectStreamer;
class MCObjectTargetWriter;
class MCObjectWriter;
struct MCCodePaddingContext;
class MCRelaxableFragment;
@ -56,8 +57,11 @@ public:
/// Create a new MCObjectWriter instance for use by the assembler backend to
/// emit the final object file.
virtual std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const = 0;
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const;
virtual std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const = 0;
/// \name Target Fixup Interfaces
/// @{

8
include/llvm/MC/MCELFObjectWriter.h
View File

@ -12,6 +12,7 @@
#include "llvm/ADT/Triple.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/MC/MCObjectWriter.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/raw_ostream.h"
#include <cstdint>
@ -50,7 +51,7 @@ struct ELFRelocationEntry {
void dump() const { print(errs()); }
};
class MCELFObjectTargetWriter {
class MCELFObjectTargetWriter : public MCObjectTargetWriter {
const uint8_t OSABI;
const uint16_t EMachine;
const unsigned HasRelocationAddend : 1;
@ -63,6 +64,11 @@ protected:
public:
virtual ~MCELFObjectTargetWriter() = default;
virtual Triple::ObjectFormatType getFormat() const { return Triple::ELF; }
static bool classof(const MCObjectTargetWriter *W) {
return W->getFormat() == Triple::ELF;
}
static uint8_t getOSABI(Triple::OSType OSType) {
switch (OSType) {
case Triple::CloudABI:

7
include/llvm/MC/MCMachObjectWriter.h
View File

@ -26,7 +26,7 @@ namespace llvm {
class MachObjectWriter;
class MCMachObjectTargetWriter {
class MCMachObjectTargetWriter : public MCObjectTargetWriter {
const unsigned Is64Bit : 1;
const uint32_t CPUType;
const uint32_t CPUSubtype;
@ -43,6 +43,11 @@ protected:
public:
virtual ~MCMachObjectTargetWriter();
virtual Triple::ObjectFormatType getFormat() const { return Triple::MachO; }
static bool classof(const MCObjectTargetWriter *W) {
return W->getFormat() == Triple::MachO;
}
/// \name Lifetime Management
/// @{

9
include/llvm/MC/MCObjectWriter.h
View File

@ -12,6 +12,7 @@
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/Triple.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/EndianStream.h"
#include "llvm/Support/raw_ostream.h"
@ -101,6 +102,14 @@ public:
/// @}
};
/// Base class for classes that define behaviour that is specific to both the
/// target and the object format.
class MCObjectTargetWriter {
public:
virtual ~MCObjectTargetWriter() = default;
virtual Triple::ObjectFormatType getFormat() const = 0;
};
} // end namespace llvm
#endif // LLVM_MC_MCOBJECTWRITER_H

9
include/llvm/MC/MCWasmObjectWriter.h
View File

@ -10,16 +10,16 @@
#ifndef LLVM_MC_MCWASMOBJECTWRITER_H
#define LLVM_MC_MCWASMOBJECTWRITER_H
#include "llvm/MC/MCObjectWriter.h"
#include <memory>
namespace llvm {
class MCFixup;
class MCObjectWriter;
class MCValue;
class raw_pwrite_stream;
class MCWasmObjectTargetWriter {
class MCWasmObjectTargetWriter : public MCObjectTargetWriter {
const unsigned Is64Bit : 1;
protected:
@ -28,6 +28,11 @@ protected:
public:
virtual ~MCWasmObjectTargetWriter();
virtual Triple::ObjectFormatType getFormat() const { return Triple::Wasm; }
static bool classof(const MCObjectTargetWriter *W) {
return W->getFormat() == Triple::Wasm;
}
virtual unsigned getRelocType(const MCValue &Target,
const MCFixup &Fixup) const = 0;

9
include/llvm/MC/MCWinCOFFObjectWriter.h
View File

@ -10,6 +10,7 @@
#ifndef LLVM_MC_MCWINCOFFOBJECTWRITER_H
#define LLVM_MC_MCWINCOFFOBJECTWRITER_H
#include "llvm/MC/MCObjectWriter.h"
#include <memory>
namespace llvm {
@ -17,11 +18,10 @@ namespace llvm {
class MCAsmBackend;
class MCContext;
class MCFixup;
class MCObjectWriter;
class MCValue;
class raw_pwrite_stream;
class MCWinCOFFObjectTargetWriter {
class MCWinCOFFObjectTargetWriter : public MCObjectTargetWriter {
virtual void anchor();
const unsigned Machine;
@ -32,6 +32,11 @@ class raw_pwrite_stream;
public:
virtual ~MCWinCOFFObjectTargetWriter() = default;
virtual Triple::ObjectFormatType getFormat() const { return Triple::COFF; }
static bool classof(const MCObjectTargetWriter *W) {
return W->getFormat() == Triple::COFF;
}
unsigned getMachine() const { return Machine; }
virtual unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
const MCFixup &Fixup, bool IsCrossSection,

26
lib/MC/MCAsmBackend.cpp
View File

@ -11,7 +11,12 @@
#include "llvm/ADT/None.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/MC/MCCodePadder.h"
#include "llvm/MC/MCELFObjectWriter.h"
#include "llvm/MC/MCFixupKindInfo.h"
#include "llvm/MC/MCMachObjectWriter.h"
#include "llvm/MC/MCObjectWriter.h"
#include "llvm/MC/MCWasmObjectWriter.h"
#include "llvm/MC/MCWinCOFFObjectWriter.h"
#include <cassert>
#include <cstddef>
#include <cstdint>
@ -23,6 +28,27 @@ MCAsmBackend::MCAsmBackend(support::endianness Endian)
MCAsmBackend::~MCAsmBackend() = default;
std::unique_ptr<MCObjectWriter>
MCAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const {
auto TW = createObjectTargetWriter();
switch (TW->getFormat()) {
case Triple::ELF:
return createELFObjectWriter(cast<MCELFObjectTargetWriter>(std::move(TW)), OS,
Endian == support::little);
case Triple::MachO:
return createMachObjectWriter(cast<MCMachObjectTargetWriter>(std::move(TW)),
OS, Endian == support::little);
case Triple::COFF:
return createWinCOFFObjectWriter(
cast<MCWinCOFFObjectTargetWriter>(std::move(TW)), OS);
case Triple::Wasm:
return createWasmObjectWriter(cast<MCWasmObjectTargetWriter>(std::move(TW)),
OS);
default:
llvm_unreachable("unexpected object format");
}
}
Optional<MCFixupKind> MCAsmBackend::getFixupKind(StringRef Name) const {
return None;
}

19
lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
View File

@ -430,9 +430,9 @@ public:
const MCRegisterInfo &MRI)
: AArch64AsmBackend(T, TT, /*IsLittleEndian*/ true), MRI(MRI) {}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
return createAArch64MachObjectWriter(OS, MachO::CPU_TYPE_ARM64,
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
return createAArch64MachObjectWriter(MachO::CPU_TYPE_ARM64,
MachO::CPU_SUBTYPE_ARM64_ALL);
}
@ -581,10 +581,9 @@ public:
: AArch64AsmBackend(T, TT, IsLittleEndian), OSABI(OSABI),
IsILP32(IsILP32) {}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
return createAArch64ELFObjectWriter(OS, OSABI,
Endian == support::little, IsILP32);
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
return createAArch64ELFObjectWriter(OSABI, IsILP32);
}
};
@ -596,9 +595,9 @@ public:
COFFAArch64AsmBackend(const Target &T, const Triple &TheTriple)
: AArch64AsmBackend(T, TheTriple, /*IsLittleEndian*/ true) {}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
return createAArch64WinCOFFObjectWriter(OS);
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
return createAArch64WinCOFFObjectWriter();
}
};
}

15
lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
View File

@ -31,7 +31,7 @@ namespace {
class AArch64ELFObjectWriter : public MCELFObjectTargetWriter {
public:
AArch64ELFObjectWriter(uint8_t OSABI, bool IsLittleEndian, bool IsILP32);
AArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32);
~AArch64ELFObjectWriter() override = default;
@ -43,9 +43,7 @@ protected:
} // end anonymous namespace
AArch64ELFObjectWriter::AArch64ELFObjectWriter(uint8_t OSABI,
bool IsLittleEndian,
bool IsILP32)
AArch64ELFObjectWriter::AArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32)
: MCELFObjectTargetWriter(/*Is64Bit*/ true, OSABI, ELF::EM_AARCH64,
/*HasRelocationAddend*/ true),
IsILP32(IsILP32) {}
@ -429,10 +427,7 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
llvm_unreachable("Unimplemented fixup -> relocation");
}
std::unique_ptr<MCObjectWriter>
llvm::createAArch64ELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI,
bool IsLittleEndian, bool IsILP32) {
auto MOTW =
llvm::make_unique<AArch64ELFObjectWriter>(OSABI, IsLittleEndian, IsILP32);
return createELFObjectWriter(std::move(MOTW), OS, IsLittleEndian);
std::unique_ptr<MCObjectTargetWriter>
llvm::createAArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32) {
return llvm::make_unique<AArch64ELFObjectWriter>(OSABI, IsILP32);
}

15
lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
View File

@ -26,7 +26,7 @@ class MCContext;
class MCInstrInfo;
class MCInstPrinter;
class MCRegisterInfo;
class MCObjectWriter;
class MCObjectTargetWriter;
class MCStreamer;
class MCSubtargetInfo;
class MCTargetOptions;
@ -53,16 +53,13 @@ MCAsmBackend *createAArch64beAsmBackend(const Target &T,
const MCRegisterInfo &MRI,
const MCTargetOptions &Options);
std::unique_ptr<MCObjectWriter>
createAArch64ELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI,
bool IsLittleEndian, bool IsILP32);
std::unique_ptr<MCObjectTargetWriter>
createAArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32);
std::unique_ptr<MCObjectWriter>
createAArch64MachObjectWriter(raw_pwrite_stream &OS, uint32_t CPUType,
uint32_t CPUSubtype);
std::unique_ptr<MCObjectTargetWriter>
createAArch64MachObjectWriter(uint32_t CPUType, uint32_t CPUSubtype);
std::unique_ptr<MCObjectWriter>
createAArch64WinCOFFObjectWriter(raw_pwrite_stream &OS);
std::unique_ptr<MCObjectTargetWriter> createAArch64WinCOFFObjectWriter();
MCTargetStreamer *createAArch64AsmTargetStreamer(MCStreamer &S,
formatted_raw_ostream &OS,

9
lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp
View File

@ -404,10 +404,7 @@ void AArch64MachObjectWriter::recordRelocation(
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
}
std::unique_ptr<MCObjectWriter>
llvm::createAArch64MachObjectWriter(raw_pwrite_stream &OS, uint32_t CPUType,
uint32_t CPUSubtype) {
return createMachObjectWriter(
llvm::make_unique<AArch64MachObjectWriter>(CPUType, CPUSubtype), OS,
/*IsLittleEndian=*/true);
std::unique_ptr<MCObjectTargetWriter>
llvm::createAArch64MachObjectWriter(uint32_t CPUType, uint32_t CPUSubtype) {
return llvm::make_unique<AArch64MachObjectWriter>(CPUType, CPUSubtype);
}

6
lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
View File

@ -120,10 +120,8 @@ bool AArch64WinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const {
namespace llvm {
std::unique_ptr<MCObjectWriter>
createAArch64WinCOFFObjectWriter(raw_pwrite_stream &OS) {
auto MOTW = llvm::make_unique<AArch64WinCOFFObjectWriter>();
return createWinCOFFObjectWriter(std::move(MOTW), OS);
std::unique_ptr<MCObjectTargetWriter> createAArch64WinCOFFObjectWriter() {
return llvm::make_unique<AArch64WinCOFFObjectWriter>();
}
} // end namespace llvm

6
lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
View File

@ -188,9 +188,9 @@ public:
}
}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
return createAMDGPUELFObjectWriter(Is64Bit, OSABI, HasRelocationAddend, OS);
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
return createAMDGPUELFObjectWriter(Is64Bit, OSABI, HasRelocationAddend);
}
};

10
lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
View File

@ -82,11 +82,9 @@ unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx,
llvm_unreachable("unhandled relocation type");
}
std::unique_ptr<MCObjectWriter>
std::unique_ptr<MCObjectTargetWriter>
llvm::createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI,
bool HasRelocationAddend,
raw_pwrite_stream &OS) {
auto MOTW = llvm::make_unique<AMDGPUELFObjectWriter>(Is64Bit, OSABI,
HasRelocationAddend);
return createELFObjectWriter(std::move(MOTW), OS, true);
bool HasRelocationAddend) {
return llvm::make_unique<AMDGPUELFObjectWriter>(Is64Bit, OSABI,
HasRelocationAddend);
}

6
lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h
View File

@ -25,7 +25,7 @@ class MCAsmBackend;
class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCObjectWriter;
class MCObjectTargetWriter;
class MCRegisterInfo;
class MCSubtargetInfo;
class MCTargetOptions;
@ -50,9 +50,9 @@ MCAsmBackend *createAMDGPUAsmBackend(const Target &T,
const MCRegisterInfo &MRI,
const MCTargetOptions &Options);
std::unique_ptr<MCObjectWriter>
std::unique_ptr<MCObjectTargetWriter>
createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI,
bool HasRelocationAddend, raw_pwrite_stream &OS);
bool HasRelocationAddend);
} // End llvm namespace
#define GET_REGINFO_ENUM

6
lib/Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h
View File

@ -23,9 +23,9 @@ public:
const MCRegisterInfo &MRI, MachO::CPUSubTypeARM st)
: ARMAsmBackend(T, STI, support::little), MRI(MRI), Subtype(st) {}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
return createARMMachObjectWriter(OS, /*Is64Bit=*/false, MachO::CPU_TYPE_ARM,
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
return createARMMachObjectWriter(/*Is64Bit=*/false, MachO::CPU_TYPE_ARM,
Subtype);
}

6
lib/Target/ARM/MCTargetDesc/ARMAsmBackendELF.h
View File

@ -24,9 +24,9 @@ public:
support::endianness Endian)
: ARMAsmBackend(T, STI, Endian), OSABI(OSABI) {}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
return createARMELFObjectWriter(OS, OSABI, Endian);
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
return createARMELFObjectWriter(OSABI);
}
};
}

6
lib/Target/ARM/MCTargetDesc/ARMAsmBackendWinCOFF.h
View File

@ -19,9 +19,9 @@ class ARMAsmBackendWinCOFF : public ARMAsmBackend {
public:
ARMAsmBackendWinCOFF(const Target &T, const MCSubtargetInfo &STI)
: ARMAsmBackend(T, STI, support::little) {}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
return createARMWinCOFFObjectWriter(OS, /*Is64Bit=*/false);
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
return createARMWinCOFFObjectWriter(/*Is64Bit=*/false);
}
};
}

8
lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
View File

@ -236,9 +236,7 @@ unsigned ARMELFObjectWriter::GetRelocTypeInner(const MCValue &Target,
}
}
std::unique_ptr<MCObjectWriter>
llvm::createARMELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI,
bool IsLittleEndian) {
return createELFObjectWriter(llvm::make_unique<ARMELFObjectWriter>(OSABI), OS,
IsLittleEndian);
std::unique_ptr<MCObjectTargetWriter>
llvm::createARMELFObjectWriter(uint8_t OSABI) {
return llvm::make_unique<ARMELFObjectWriter>(OSABI);
}

16
lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h
View File

@ -25,6 +25,7 @@ class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCInstPrinter;
class MCObjectTargetWriter;
class MCObjectWriter;
class MCRegisterInfo;
class MCSubtargetInfo;
@ -86,19 +87,16 @@ MCStreamer *createARMWinCOFFStreamer(MCContext &Context,
bool IncrementalLinkerCompatible);
/// Construct an ELF Mach-O object writer.
std::unique_ptr<MCObjectWriter> createARMELFObjectWriter(raw_pwrite_stream &OS,
uint8_t OSABI,
bool IsLittleEndian);
std::unique_ptr<MCObjectTargetWriter> createARMELFObjectWriter(uint8_t OSABI);
/// Construct an ARM Mach-O object writer.
std::unique_ptr<MCObjectWriter> createARMMachObjectWriter(raw_pwrite_stream &OS,
bool Is64Bit,
uint32_t CPUType,
uint32_t CPUSubtype);
std::unique_ptr<MCObjectTargetWriter>
createARMMachObjectWriter(bool Is64Bit, uint32_t CPUType,
uint32_t CPUSubtype);
/// Construct an ARM PE/COFF object writer.
std::unique_ptr<MCObjectWriter>
createARMWinCOFFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit);
std::unique_ptr<MCObjectTargetWriter>
createARMWinCOFFObjectWriter(bool Is64Bit);
/// Construct ARM Mach-O relocation info.
MCRelocationInfo *createARMMachORelocationInfo(MCContext &Ctx);

10
lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
View File

@ -484,10 +484,8 @@ void ARMMachObjectWriter::recordRelocation(MachObjectWriter *Writer,
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
}
std::unique_ptr<MCObjectWriter>
llvm::createARMMachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
uint32_t CPUType, uint32_t CPUSubtype) {
return createMachObjectWriter(
llvm::make_unique<ARMMachObjectWriter>(Is64Bit, CPUType, CPUSubtype), OS,
/*IsLittleEndian=*/true);
std::unique_ptr<MCObjectTargetWriter>
llvm::createARMMachObjectWriter(bool Is64Bit, uint32_t CPUType,
uint32_t CPUSubtype) {
return llvm::make_unique<ARMMachObjectWriter>(Is64Bit, CPUType, CPUSubtype);
}

7
lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp
View File

@ -91,10 +91,9 @@ bool ARMWinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const {
namespace llvm {
std::unique_ptr<MCObjectWriter>
createARMWinCOFFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit) {
auto MOTW = llvm::make_unique<ARMWinCOFFObjectWriter>(Is64Bit);
return createWinCOFFObjectWriter(std::move(MOTW), OS);
std::unique_ptr<MCObjectTargetWriter>
createARMWinCOFFObjectWriter(bool Is64Bit) {
return llvm::make_unique<ARMWinCOFFObjectWriter>(Is64Bit);
}
} // end namespace llvm

7
lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
View File

@ -352,10 +352,9 @@ void AVRAsmBackend::adjustFixupValue(const MCFixup &Fixup,
}
}
std::unique_ptr<MCObjectWriter>
AVRAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const {
return createAVRELFObjectWriter(OS,
MCELFObjectTargetWriter::getOSABI(OSType));
std::unique_ptr<MCObjectTargetWriter>
AVRAsmBackend::createObjectTargetWriter() const {
return createAVRELFObjectWriter(MCELFObjectTargetWriter::getOSABI(OSType));
}
void AVRAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,

3
lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
View File

@ -37,7 +37,8 @@ public:
void adjustFixupValue(const MCFixup &Fixup, const MCValue &Target,
uint64_t &Value, MCContext *Ctx = nullptr) const;
std::unique_ptr<MCObjectWriter> createObjectWriter(raw_pwrite_stream &OS) const override;
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override;
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
const MCValue &Target, MutableArrayRef<char> Data,

6
lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp
View File

@ -152,10 +152,8 @@ unsigned AVRELFObjectWriter::getRelocType(MCContext &Ctx,
}
}
std::unique_ptr<MCObjectWriter>
createAVRELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI) {
std::unique_ptr<MCELFObjectTargetWriter> MOTW(new AVRELFObjectWriter(OSABI));
return createELFObjectWriter(std::move(MOTW), OS, true);
std::unique_ptr<MCObjectTargetWriter> createAVRELFObjectWriter(uint8_t OSABI) {
return make_unique<AVRELFObjectWriter>(OSABI);
}
} // end of namespace llvm

5
lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h
View File

@ -24,7 +24,7 @@ class MCAsmBackend;
class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCObjectWriter;
class MCObjectTargetWriter;
class MCRegisterInfo;
class MCSubtargetInfo;
class MCTargetOptions;
@ -48,8 +48,7 @@ MCAsmBackend *createAVRAsmBackend(const Target &T, const MCSubtargetInfo &STI,
const llvm::MCTargetOptions &TO);
/// Creates an ELF object writer for AVR.
std::unique_ptr<MCObjectWriter>
createAVRELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI);
std::unique_ptr<MCObjectTargetWriter> createAVRELFObjectWriter(uint8_t OSABI);
} // end namespace llvm

10
lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
View File

@ -29,8 +29,8 @@ public:
const MCValue &Target, MutableArrayRef<char> Data,
uint64_t Value, bool IsResolved) const override;
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override;
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override;
// No instruction requires relaxation
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
@ -88,9 +88,9 @@ void BPFAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
}
}
std::unique_ptr<MCObjectWriter>
BPFAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const {
return createBPFELFObjectWriter(OS, 0, Endian == support::little);
std::unique_ptr<MCObjectTargetWriter>
BPFAsmBackend::createObjectTargetWriter() const {
return createBPFELFObjectWriter(0);
}
MCAsmBackend *llvm::createBPFAsmBackend(const Target &T,

8
lib/Target/BPF/MCTargetDesc/BPFELFObjectWriter.cpp
View File

@ -54,9 +54,7 @@ unsigned BPFELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
}
}
std::unique_ptr<MCObjectWriter>
llvm::createBPFELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI,
bool IsLittleEndian) {
return createELFObjectWriter(llvm::make_unique<BPFELFObjectWriter>(OSABI), OS,
IsLittleEndian);
std::unique_ptr<MCObjectTargetWriter>
llvm::createBPFELFObjectWriter(uint8_t OSABI) {
return llvm::make_unique<BPFELFObjectWriter>(OSABI);
}

6
lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.h
View File

@ -24,7 +24,7 @@ class MCAsmBackend;
class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCObjectWriter;
class MCObjectTargetWriter;
class MCRegisterInfo;
class MCSubtargetInfo;
class MCTargetOptions;
@ -52,9 +52,7 @@ MCAsmBackend *createBPFbeAsmBackend(const Target &T, const MCSubtargetInfo &STI,
const MCRegisterInfo &MRI,
const MCTargetOptions &Options);
std::unique_ptr<MCObjectWriter> createBPFELFObjectWriter(raw_pwrite_stream &OS,
uint8_t OSABI,
bool IsLittleEndian);
std::unique_ptr<MCObjectTargetWriter> createBPFELFObjectWriter(uint8_t OSABI);
}
// Defines symbolic names for BPF registers. This defines a mapping from

6
lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
View File

@ -66,9 +66,9 @@ public:
MCII(T.createMCInstrInfo()), RelaxTarget(new MCInst *),
Extender(nullptr) {}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
return createHexagonELFObjectWriter(OS, OSABI, CPU);
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
return createHexagonELFObjectWriter(OSABI, CPU);
}
void setExtender(MCContext &Context) const {

8
lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp
View File

@ -298,9 +298,7 @@ unsigned HexagonELFObjectWriter::getRelocType(MCContext &Ctx,
}
}
std::unique_ptr<MCObjectWriter>
llvm::createHexagonELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI,
StringRef CPU) {
auto MOTW = llvm::make_unique<HexagonELFObjectWriter>(OSABI, CPU);
return createELFObjectWriter(std::move(MOTW), OS, /*IsLittleEndian*/ true);
std::unique_ptr<MCObjectTargetWriter>
llvm::createHexagonELFObjectWriter(uint8_t OSABI, StringRef CPU) {
return llvm::make_unique<HexagonELFObjectWriter>(OSABI, CPU);
}

7
lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.h
View File

@ -27,7 +27,7 @@ class MCAsmBackend;
class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCObjectWriter;
class MCObjectTargetWriter;
class MCRegisterInfo;
class MCSubtargetInfo;
class MCTargetOptions;
@ -65,9 +65,8 @@ MCAsmBackend *createHexagonAsmBackend(const Target &T,
const MCRegisterInfo &MRI,
const MCTargetOptions &Options);
std::unique_ptr<MCObjectWriter>
createHexagonELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI,
StringRef CPU);
std::unique_ptr<MCObjectTargetWriter>
createHexagonELFObjectWriter(uint8_t OSABI, StringRef CPU);
unsigned HexagonGetLastSlot();

11
lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp
View File

@ -53,8 +53,8 @@ public:
const MCValue &Target, MutableArrayRef<char> Data,
uint64_t Value, bool IsResolved) const override;
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override;
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override;
// No instruction requires relaxation
bool fixupNeedsRelaxation(const MCFixup & /*Fixup*/, uint64_t /*Value*/,
@ -127,10 +127,9 @@ void LanaiAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
}
}
std::unique_ptr<MCObjectWriter>
LanaiAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const {
return createLanaiELFObjectWriter(OS,
MCELFObjectTargetWriter::getOSABI(OSType));
std::unique_ptr<MCObjectTargetWriter>
LanaiAsmBackend::createObjectTargetWriter() const {
return createLanaiELFObjectWriter(MCELFObjectTargetWriter::getOSABI(OSType));
}
const MCFixupKindInfo &

7
lib/Target/Lanai/MCTargetDesc/LanaiELFObjectWriter.cpp
View File

@ -87,8 +87,7 @@ bool LanaiELFObjectWriter::needsRelocateWithSymbol(const MCSymbol & /*SD*/,
}
}
std::unique_ptr<MCObjectWriter>
llvm::createLanaiELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI) {
return createELFObjectWriter(llvm::make_unique<LanaiELFObjectWriter>(OSABI),
OS, /*IsLittleEndian=*/false);
std::unique_ptr<MCObjectTargetWriter>
llvm::createLanaiELFObjectWriter(uint8_t OSABI) {
return llvm::make_unique<LanaiELFObjectWriter>(OSABI);
}

5
lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.h
View File

@ -24,7 +24,7 @@ class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCInstrAnalysis;
class MCObjectWriter;
class MCObjectTargetWriter;
class MCRelocationInfo;
class MCSubtargetInfo;
class Target;
@ -42,8 +42,7 @@ MCAsmBackend *createLanaiAsmBackend(const Target &T, const MCSubtargetInfo &STI,
const MCRegisterInfo &MRI,
const MCTargetOptions &Options);
std::unique_ptr<MCObjectWriter>
createLanaiELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI);
std::unique_ptr<MCObjectTargetWriter> createLanaiELFObjectWriter(uint8_t OSABI);
} // namespace llvm
// Defines symbolic names for Lanai registers. This defines a mapping from

6
lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
View File

@ -211,9 +211,9 @@ static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
return Value;
}
std::unique_ptr<MCObjectWriter>
MipsAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const {
return createMipsELFObjectWriter(OS, TheTriple, IsN32);
std::unique_ptr<MCObjectTargetWriter>
MipsAsmBackend::createObjectTargetWriter() const {
return createMipsELFObjectWriter(TheTriple, IsN32);
}
// Little-endian fixup data byte ordering:

4
lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
View File

@ -37,8 +37,8 @@ public:
: MCAsmBackend(TT.isLittleEndian() ? support::little : support::big),
TheTriple(TT), IsN32(N32) {}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override;
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override;
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
const MCValue &Target, MutableArrayRef<char> Data,

16
lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
View File

@ -56,8 +56,7 @@ raw_ostream &operator<<(raw_ostream &OS, const MipsRelocationEntry &RHS) {
class MipsELFObjectWriter : public MCELFObjectTargetWriter {
public:
MipsELFObjectWriter(uint8_t OSABI, bool HasRelocationAddend, bool Is64,
bool IsLittleEndian);
MipsELFObjectWriter(uint8_t OSABI, bool HasRelocationAddend, bool Is64);
~MipsELFObjectWriter() override = default;
@ -211,8 +210,7 @@ static void dumpRelocs(const char *Prefix, const Container &Relocs) {
#endif
MipsELFObjectWriter::MipsELFObjectWriter(uint8_t OSABI,
bool HasRelocationAddend, bool Is64,
bool IsLittleEndian)
bool HasRelocationAddend, bool Is64)
: MCELFObjectTargetWriter(Is64, OSABI, ELF::EM_MIPS, HasRelocationAddend) {}
unsigned MipsELFObjectWriter::getRelocType(MCContext &Ctx,
@ -658,13 +656,11 @@ bool MipsELFObjectWriter::needsRelocateWithSymbol(const MCSymbol &Sym,
}
}
std::unique_ptr<MCObjectWriter>
llvm::createMipsELFObjectWriter(raw_pwrite_stream &OS, const Triple &TT,
bool IsN32) {
std::unique_ptr<MCObjectTargetWriter>
llvm::createMipsELFObjectWriter(const Triple &TT, bool IsN32) {
uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
bool IsN64 = TT.isArch64Bit() && !IsN32;
bool HasRelocationAddend = TT.isArch64Bit();
auto MOTW = llvm::make_unique<MipsELFObjectWriter>(
OSABI, HasRelocationAddend, IsN64, TT.isLittleEndian());
return createELFObjectWriter(std::move(MOTW), OS, TT.isLittleEndian());
return llvm::make_unique<MipsELFObjectWriter>(OSABI, HasRelocationAddend,
IsN64);
}

6
lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
View File

@ -23,7 +23,7 @@ class MCAsmBackend;
class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCObjectWriter;
class MCObjectTargetWriter;
class MCRegisterInfo;
class MCSubtargetInfo;
class MCTargetOptions;
@ -49,8 +49,8 @@ MCAsmBackend *createMipsAsmBackend(const Target &T, const MCSubtargetInfo &STI,
const MCRegisterInfo &MRI,
const MCTargetOptions &Options);
std::unique_ptr<MCObjectWriter>
createMipsELFObjectWriter(raw_pwrite_stream &OS, const Triple &TT, bool IsN32);
std::unique_ptr<MCObjectTargetWriter>
createMipsELFObjectWriter(const Triple &TT, bool IsN32);
namespace MIPS_MC {
StringRef selectMipsCPU(const Triple &TT, StringRef CPU);

7
lib/Target/Nios2/MCTargetDesc/Nios2AsmBackend.cpp
View File

@ -112,10 +112,9 @@ Nios2AsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
return Infos[Kind - FirstTargetFixupKind];
}
std::unique_ptr<MCObjectWriter>
Nios2AsmBackend::createObjectWriter(raw_pwrite_stream &OS) const {
return createNios2ELFObjectWriter(OS,
MCELFObjectTargetWriter::getOSABI(OSType));
std::unique_ptr<MCObjectTargetWriter>
Nios2AsmBackend::createObjectTargetWriter() const {
return createNios2ELFObjectWriter(MCELFObjectTargetWriter::getOSABI(OSType));
}
bool Nios2AsmBackend::writeNopData(raw_ostream &OS, uint64_t Count) const {

4
lib/Target/Nios2/MCTargetDesc/Nios2AsmBackend.h
View File

@ -33,8 +33,8 @@ public:
Nios2AsmBackend(const Target &T, Triple::OSType OSType)
: MCAsmBackend(support::little), OSType(OSType) {}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override;
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override;
bool writeNopData(raw_ostream &OS, uint64_t Count) const override;

7
lib/Target/Nios2/MCTargetDesc/Nios2ELFObjectWriter.cpp
View File

@ -37,8 +37,7 @@ unsigned Nios2ELFObjectWriter::getRelocType(MCContext &Ctx,
return 0;
}
std::unique_ptr<MCObjectWriter>
llvm::createNios2ELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI) {
auto MOTW = llvm::make_unique<Nios2ELFObjectWriter>(OSABI);
return createELFObjectWriter(std::move(MOTW), OS, true);
std::unique_ptr<MCObjectTargetWriter>
llvm::createNios2ELFObjectWriter(uint8_t OSABI) {
return llvm::make_unique<Nios2ELFObjectWriter>(OSABI);
}

5
lib/Target/Nios2/MCTargetDesc/Nios2MCTargetDesc.h
View File

@ -18,7 +18,7 @@
namespace llvm {
class MCAsmBackend;
class MCObjectWriter;
class MCObjectTargetWriter;
class MCRegisterInfo;
class MCSubtargetInfo;
class MCTargetOptions;
@ -33,8 +33,7 @@ MCAsmBackend *createNios2AsmBackend(const Target &T, const MCSubtargetInfo &STI,
const MCRegisterInfo &MRI,
const MCTargetOptions &Options);
std::unique_ptr<MCObjectWriter>
createNios2ELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI);
std::unique_ptr<MCObjectTargetWriter> createNios2ELFObjectWriter(uint8_t OSABI);
} // namespace llvm

12
lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
View File

@ -202,11 +202,10 @@ namespace {
public:
DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T, support::big) { }
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
bool is64 = getPointerSize() == 8;
return createPPCMachObjectWriter(
OS,
/*Is64Bit=*/is64,
(is64 ? MachO::CPU_TYPE_POWERPC64 : MachO::CPU_TYPE_POWERPC),
MachO::CPU_SUBTYPE_POWERPC_ALL);
@ -220,11 +219,10 @@ namespace {
uint8_t OSABI)
: PPCAsmBackend(T, Endian), OSABI(OSABI) {}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
bool is64 = getPointerSize() == 8;
return createPPCELFObjectWriter(OS, is64, Endian == support::little,
OSABI);
return createPPCELFObjectWriter(is64, OSABI);
}
};

8
lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
View File

@ -417,9 +417,7 @@ bool PPCELFObjectWriter::needsRelocateWithSymbol(const MCSymbol &Sym,
}
}
std::unique_ptr<MCObjectWriter>
llvm::createPPCELFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
bool IsLittleEndian, uint8_t OSABI) {
auto MOTW = llvm::make_unique<PPCELFObjectWriter>(Is64Bit, OSABI);
return createELFObjectWriter(std::move(MOTW), OS, IsLittleEndian);
std::unique_ptr<MCObjectTargetWriter>
llvm::createPPCELFObjectWriter(bool Is64Bit, uint8_t OSABI) {
return llvm::make_unique<PPCELFObjectWriter>(Is64Bit, OSABI);
}

14
lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
View File

@ -27,7 +27,7 @@ class MCAsmBackend;
class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCObjectWriter;
class MCObjectTargetWriter;
class MCRegisterInfo;
class MCSubtargetInfo;
class MCTargetOptions;
@ -49,15 +49,11 @@ MCAsmBackend *createPPCAsmBackend(const Target &T, const MCSubtargetInfo &STI,
const MCTargetOptions &Options);
/// Construct an PPC ELF object writer.
std::unique_ptr<MCObjectWriter> createPPCELFObjectWriter(raw_pwrite_stream &OS,
bool Is64Bit,
bool IsLittleEndian,
uint8_t OSABI);
std::unique_ptr<MCObjectTargetWriter> createPPCELFObjectWriter(bool Is64Bit,
uint8_t OSABI);
/// Construct a PPC Mach-O object writer.
std::unique_ptr<MCObjectWriter> createPPCMachObjectWriter(raw_pwrite_stream &OS,
bool Is64Bit,
uint32_t CPUType,
uint32_t CPUSubtype);
std::unique_ptr<MCObjectTargetWriter>
createPPCMachObjectWriter(bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype);
/// Returns true iff Val consists of one contiguous run of 1s with any number of
/// 0s on either side. The 1s are allowed to wrap from LSB to MSB, so

10
lib/Target/PowerPC/MCTargetDesc/PPCMachObjectWriter.cpp
View File

@ -374,10 +374,8 @@ void PPCMachObjectWriter::RecordPPCRelocation(
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
}
std::unique_ptr<MCObjectWriter>
llvm::createPPCMachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
uint32_t CPUType, uint32_t CPUSubtype) {
return createMachObjectWriter(
llvm::make_unique<PPCMachObjectWriter>(Is64Bit, CPUType, CPUSubtype), OS,
/*IsLittleEndian=*/false);
std::unique_ptr<MCObjectTargetWriter>
llvm::createPPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
uint32_t CPUSubtype) {
return llvm::make_unique<PPCMachObjectWriter>(Is64Bit, CPUType, CPUSubtype);
}

10
lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
View File

@ -41,8 +41,8 @@ public:
const MCValue &Target, MutableArrayRef<char> Data,
uint64_t Value, bool IsResolved) const override;
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override;
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override;
// If linker relaxation is enabled, always emit relocations even if the fixup
// can be resolved. This is necessary for correctness as offsets may change
@ -335,9 +335,9 @@ void RISCVAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
}
}
std::unique_ptr<MCObjectWriter>
RISCVAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const {
return createRISCVELFObjectWriter(OS, OSABI, Is64Bit);
std::unique_ptr<MCObjectTargetWriter>
RISCVAsmBackend::createObjectTargetWriter() const {
return createRISCVELFObjectWriter(OSABI, Is64Bit);
}
} // end anonymous namespace

9
lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
View File

@ -81,10 +81,7 @@ unsigned RISCVELFObjectWriter::getRelocType(MCContext &Ctx,
}
}
std::unique_ptr<MCObjectWriter>
llvm::createRISCVELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI,
bool Is64Bit) {
return createELFObjectWriter(
llvm::make_unique<RISCVELFObjectWriter>(OSABI, Is64Bit), OS,
/*IsLittleEndian=*/true);
std::unique_ptr<MCObjectTargetWriter>
llvm::createRISCVELFObjectWriter(uint8_t OSABI, bool Is64Bit) {
return llvm::make_unique<RISCVELFObjectWriter>(OSABI, Is64Bit);
}

6
lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h
View File

@ -24,7 +24,7 @@ class MCAsmBackend;
class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCObjectWriter;
class MCObjectTargetWriter;
class MCRegisterInfo;
class MCSubtargetInfo;
class StringRef;
@ -44,8 +44,8 @@ MCAsmBackend *createRISCVAsmBackend(const Target &T, const MCSubtargetInfo &STI,
const MCRegisterInfo &MRI,
const MCTargetOptions &Options);
std::unique_ptr<MCObjectWriter>
createRISCVELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, bool Is64Bit);
std::unique_ptr<MCObjectTargetWriter> createRISCVELFObjectWriter(uint8_t OSABI,
bool Is64Bit);
}
// Defines symbolic names for RISC-V registers.

7
lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
View File

@ -291,11 +291,10 @@ namespace {
}
}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(OSType);
return createSparcELFObjectWriter(OS, Is64Bit,
Endian == support::little, OSABI);
return createSparcELFObjectWriter(Is64Bit, OSABI);
}
};

8
lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
View File

@ -132,9 +132,7 @@ bool SparcELFObjectWriter::needsRelocateWithSymbol(const MCSymbol &Sym,
}
}
std::unique_ptr<MCObjectWriter>
llvm::createSparcELFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
bool IsLittleEndian, uint8_t OSABI) {
auto MOTW = llvm::make_unique<SparcELFObjectWriter>(Is64Bit, OSABI);
return createELFObjectWriter(std::move(MOTW), OS, IsLittleEndian);
std::unique_ptr<MCObjectTargetWriter>
llvm::createSparcELFObjectWriter(bool Is64Bit, uint8_t OSABI) {
return llvm::make_unique<SparcELFObjectWriter>(Is64Bit, OSABI);
}

7
lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h
View File

@ -23,7 +23,7 @@ class MCAsmBackend;
class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCObjectWriter;
class MCObjectTargetWriter;
class MCRegisterInfo;
class MCSubtargetInfo;
class MCTargetOptions;
@ -43,9 +43,8 @@ MCCodeEmitter *createSparcMCCodeEmitter(const MCInstrInfo &MCII,
MCAsmBackend *createSparcAsmBackend(const Target &T, const MCSubtargetInfo &STI,
const MCRegisterInfo &MRI,
const MCTargetOptions &Options);
std::unique_ptr<MCObjectWriter>
createSparcELFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
bool IsLIttleEndian, uint8_t OSABI);
std::unique_ptr<MCObjectTargetWriter> createSparcELFObjectWriter(bool Is64Bit,
uint8_t OSABI);
} // End llvm namespace
// Defines symbolic names for Sparc registers. This defines a mapping from

6
lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
View File

@ -67,9 +67,9 @@ public:
llvm_unreachable("SystemZ does do not have assembler relaxation");
}
bool writeNopData(raw_ostream &OS, uint64_t Count) const override;
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
return createSystemZObjectWriter(OS, OSABI);
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
return createSystemZObjectWriter(OSABI);
}
};
} // end anonymous namespace

7
lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp
View File

@ -161,8 +161,7 @@ unsigned SystemZObjectWriter::getRelocType(MCContext &Ctx,
}
}
std::unique_ptr<MCObjectWriter>
llvm::createSystemZObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI) {
return createELFObjectWriter(llvm::make_unique<SystemZObjectWriter>(OSABI),
OS, /*IsLittleEndian=*/false);
std::unique_ptr<MCObjectTargetWriter>
llvm::createSystemZObjectWriter(uint8_t OSABI) {
return llvm::make_unique<SystemZObjectWriter>(OSABI);
}

5
lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h
View File

@ -20,7 +20,7 @@ class MCAsmBackend;
class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCObjectWriter;
class MCObjectTargetWriter;
class MCRegisterInfo;
class MCSubtargetInfo;
class MCTargetOptions;
@ -93,8 +93,7 @@ MCAsmBackend *createSystemZMCAsmBackend(const Target &T,
const MCRegisterInfo &MRI,
const MCTargetOptions &Options);
std::unique_ptr<MCObjectWriter> createSystemZObjectWriter(raw_pwrite_stream &OS,
uint8_t OSABI);
std::unique_ptr<MCObjectTargetWriter> createSystemZObjectWriter(uint8_t OSABI);
} // end namespace llvm
// Defines symbolic names for SystemZ registers.

20
lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
View File

@ -41,8 +41,8 @@ public:
const MCValue &Target, MutableArrayRef<char> Data,
uint64_t Value, bool IsPCRel) const override;
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override;
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override;
// No instruction requires relaxation
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
@ -83,8 +83,8 @@ public:
const MCValue &Target, MutableArrayRef<char> Data,
uint64_t Value, bool IsPCRel) const override;
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override;
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override;
// No instruction requires relaxation
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
@ -133,9 +133,9 @@ void WebAssemblyAsmBackendELF::applyFixup(const MCAssembler &Asm,
Data[Offset + i] |= uint8_t((Value >> (i * 8)) & 0xff);
}
std::unique_ptr<MCObjectWriter>
WebAssemblyAsmBackendELF::createObjectWriter(raw_pwrite_stream &OS) const {
return createWebAssemblyELFObjectWriter(OS, Is64Bit, 0);
std::unique_ptr<MCObjectTargetWriter>
WebAssemblyAsmBackendELF::createObjectTargetWriter() const {
return createWebAssemblyELFObjectWriter(Is64Bit, 0);
}
const MCFixupKindInfo &
@ -193,9 +193,9 @@ void WebAssemblyAsmBackend::applyFixup(const MCAssembler &Asm,
Data[Offset + i] |= uint8_t((Value >> (i * 8)) & 0xff);
}
std::unique_ptr<MCObjectWriter>
WebAssemblyAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const {
return createWebAssemblyWasmObjectWriter(OS, Is64Bit);
std::unique_ptr<MCObjectTargetWriter>
WebAssemblyAsmBackend::createObjectTargetWriter() const {
return createWebAssemblyWasmObjectWriter(Is64Bit);
}
} // end anonymous namespace

9
lib/Target/WebAssembly/MCTargetDesc/WebAssemblyELFObjectWriter.cpp
View File

@ -59,10 +59,7 @@ unsigned WebAssemblyELFObjectWriter::getRelocType(MCContext &Ctx,
}
}
std::unique_ptr<MCObjectWriter>
llvm::createWebAssemblyELFObjectWriter(raw_pwrite_stream &OS,
bool Is64Bit,
uint8_t OSABI) {
auto MOTW = llvm::make_unique<WebAssemblyELFObjectWriter>(Is64Bit, OSABI);
return createELFObjectWriter(std::move(MOTW), OS, /*IsLittleEndian=*/true);
std::unique_ptr<MCObjectTargetWriter>
llvm::createWebAssemblyELFObjectWriter(bool Is64Bit, uint8_t OSABI) {
return llvm::make_unique<WebAssemblyELFObjectWriter>(Is64Bit, OSABI);
}

12
lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
View File

@ -26,7 +26,7 @@ class MCAsmBackend;
class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCObjectWriter;
class MCObjectTargetWriter;
class MCSubtargetInfo;
class MVT;
class Target;
@ -40,13 +40,11 @@ MCCodeEmitter *createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII);
MCAsmBackend *createWebAssemblyAsmBackend(const Triple &TT);
std::unique_ptr<MCObjectWriter>
createWebAssemblyELFObjectWriter(raw_pwrite_stream &OS,
bool Is64Bit, uint8_t OSABI);
std::unique_ptr<MCObjectTargetWriter>
createWebAssemblyELFObjectWriter(bool Is64Bit, uint8_t OSABI);
std::unique_ptr<MCObjectWriter>
createWebAssemblyWasmObjectWriter(raw_pwrite_stream &OS,
bool Is64Bit);
std::unique_ptr<MCObjectTargetWriter>
createWebAssemblyWasmObjectWriter(bool Is64Bit);
namespace WebAssembly {
enum OperandType {

8
lib/Target/WebAssembly/MCTargetDesc/WebAssemblyWasmObjectWriter.cpp
View File

@ -121,9 +121,7 @@ WebAssemblyWasmObjectWriter::getRelocType(const MCValue &Target,
}
}
std::unique_ptr<MCObjectWriter>
llvm::createWebAssemblyWasmObjectWriter(raw_pwrite_stream &OS,
bool Is64Bit) {
auto MOTW = llvm::make_unique<WebAssemblyWasmObjectWriter>(Is64Bit);
return createWasmObjectWriter(std::move(MOTW), OS);
std::unique_ptr<MCObjectTargetWriter>
llvm::createWebAssemblyWasmObjectWriter(bool Is64Bit) {
return llvm::make_unique<WebAssemblyWasmObjectWriter>(Is64Bit);
}

44
lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
View File

@ -390,9 +390,9 @@ public:
const MCSubtargetInfo &STI)
: ELFX86AsmBackend(T, OSABI, STI) {}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
return createX86ELFObjectWriter(OS, /*IsELF64*/ false, OSABI, ELF::EM_386);
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
return createX86ELFObjectWriter(/*IsELF64*/ false, OSABI, ELF::EM_386);
}
};
@ -402,9 +402,9 @@ public:
const MCSubtargetInfo &STI)
: ELFX86AsmBackend(T, OSABI, STI) {}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
return createX86ELFObjectWriter(OS, /*IsELF64*/ false, OSABI,
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
return createX86ELFObjectWriter(/*IsELF64*/ false, OSABI,
ELF::EM_X86_64);
}
};
@ -415,9 +415,9 @@ public:
const MCSubtargetInfo &STI)
: ELFX86AsmBackend(T, OSABI, STI) {}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
return createX86ELFObjectWriter(OS, /*IsELF64*/ false, OSABI,
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
return createX86ELFObjectWriter(/*IsELF64*/ false, OSABI,
ELF::EM_IAMCU);
}
};
@ -428,9 +428,9 @@ public:
const MCSubtargetInfo &STI)
: ELFX86AsmBackend(T, OSABI, STI) {}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
return createX86ELFObjectWriter(OS, /*IsELF64*/ true, OSABI, ELF::EM_X86_64);
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
return createX86ELFObjectWriter(/*IsELF64*/ true, OSABI, ELF::EM_X86_64);
}
};
@ -452,9 +452,9 @@ public:
.Default(MCAsmBackend::getFixupKind(Name));
}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
return createX86WinCOFFObjectWriter(OS, Is64Bit);
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
return createX86WinCOFFObjectWriter(Is64Bit);
}
};
@ -813,9 +813,9 @@ public:
const MCSubtargetInfo &STI)
: DarwinX86AsmBackend(T, MRI, STI, false) {}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
return createX86MachObjectWriter(OS, /*Is64Bit=*/false,
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
return createX86MachObjectWriter(/*Is64Bit=*/false,
MachO::CPU_TYPE_I386,
MachO::CPU_SUBTYPE_I386_ALL);
}
@ -834,10 +834,10 @@ public:
const MCSubtargetInfo &STI, MachO::CPUSubTypeX86 st)
: DarwinX86AsmBackend(T, MRI, STI, true), Subtype(st) {}
std::unique_ptr<MCObjectWriter>
createObjectWriter(raw_pwrite_stream &OS) const override {
return createX86MachObjectWriter(OS, /*Is64Bit=*/true,
MachO::CPU_TYPE_X86_64, Subtype);
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
return createX86MachObjectWriter(/*Is64Bit=*/true, MachO::CPU_TYPE_X86_64,
Subtype);
}
/// Generate the compact unwind encoding for the CFI instructions.

8
lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
View File

@ -301,9 +301,7 @@ unsigned X86ELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
return getRelocType32(Ctx, Modifier, getType32(Type), IsPCRel, Kind);
}
std::unique_ptr<MCObjectWriter>
llvm::createX86ELFObjectWriter(raw_pwrite_stream &OS, bool IsELF64,
uint8_t OSABI, uint16_t EMachine) {
auto MOTW = llvm::make_unique<X86ELFObjectWriter>(IsELF64, OSABI, EMachine);
return createELFObjectWriter(std::move(MOTW), OS, /*IsLittleEndian=*/true);
std::unique_ptr<MCObjectTargetWriter>
llvm::createX86ELFObjectWriter(bool IsELF64, uint8_t OSABI, uint16_t EMachine) {
return llvm::make_unique<X86ELFObjectWriter>(IsELF64, OSABI, EMachine);
}

17
lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
View File

@ -23,6 +23,7 @@ class MCAsmBackend;
class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCObjectTargetWriter;
class MCObjectWriter;
class MCRegisterInfo;
class MCSubtargetInfo;
@ -101,19 +102,15 @@ MCStreamer *createX86WinCOFFStreamer(MCContext &C,
bool IncrementalLinkerCompatible);
/// Construct an X86 Mach-O object writer.
std::unique_ptr<MCObjectWriter> createX86MachObjectWriter(raw_pwrite_stream &OS,
bool Is64Bit,
uint32_t CPUType,
uint32_t CPUSubtype);
std::unique_ptr<MCObjectTargetWriter>
createX86MachObjectWriter(bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype);
/// Construct an X86 ELF object writer.
std::unique_ptr<MCObjectWriter> createX86ELFObjectWriter(raw_pwrite_stream &OS,
bool IsELF64,
uint8_t OSABI,
uint16_t EMachine);
std::unique_ptr<MCObjectTargetWriter>
createX86ELFObjectWriter(bool IsELF64, uint8_t OSABI, uint16_t EMachine);
/// Construct an X86 Win COFF object writer.
std::unique_ptr<MCObjectWriter>
createX86WinCOFFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit);
std::unique_ptr<MCObjectTargetWriter>
createX86WinCOFFObjectWriter(bool Is64Bit);
/// Returns the sub or super register of a specific X86 register.
/// e.g. getX86SubSuperRegister(X86::EAX, 16) returns X86::AX.

10
lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
View File

@ -598,10 +598,8 @@ void X86MachObjectWriter::RecordX86Relocation(MachObjectWriter *Writer,
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
}
std::unique_ptr<MCObjectWriter>
llvm::createX86MachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
uint32_t CPUType, uint32_t CPUSubtype) {
return createMachObjectWriter(
llvm::make_unique<X86MachObjectWriter>(Is64Bit, CPUType, CPUSubtype), OS,
/*IsLittleEndian=*/true);
std::unique_ptr<MCObjectTargetWriter>
llvm::createX86MachObjectWriter(bool Is64Bit, uint32_t CPUType,
uint32_t CPUSubtype) {
return llvm::make_unique<X86MachObjectWriter>(Is64Bit, CPUType, CPUSubtype);
}

7
lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
View File

@ -106,8 +106,7 @@ unsigned X86WinCOFFObjectWriter::getRelocType(MCContext &Ctx,
llvm_unreachable("Unsupported COFF machine type.");
}
std::unique_ptr<MCObjectWriter>
llvm::createX86WinCOFFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit) {
auto MOTW = llvm::make_unique<X86WinCOFFObjectWriter>(Is64Bit);
return createWinCOFFObjectWriter(std::move(MOTW), OS);
std::unique_ptr<MCObjectTargetWriter>
llvm::createX86WinCOFFObjectWriter(bool Is64Bit) {
return llvm::make_unique<X86WinCOFFObjectWriter>(Is64Bit);
}