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Make sure we use the correct register class here since we'll need to

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care about spill values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134122 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2011-06-30 01:05:46 +00:00
parent 5d8aa345dd
commit 0a1509e779
1 changed files with 2 additions and 1 deletions
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3
lib/Target/Alpha/AlphaISelLowering.cpp
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@ -835,7 +835,8 @@ getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const
case 'r': case 'r':
return std::make_pair(0U, Alpha::GPRCRegisterClass); return std::make_pair(0U, Alpha::GPRCRegisterClass);
case 'f': case 'f':
return std::make_pair(0U, Alpha::F4RCRegisterClass); return VT == MVT::f64 ? std::make_pair(0U, Alpha::F8RCRegisterClass) :
std::make_pair(0U, Alpha::F4RCRegisterClass);
} }
} }
return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT); return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);