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Ensure REG_SEQUENCE source operands are unique.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103449 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1164,6 +1164,8 @@ bool TwoAddressInstructionPass::EliminateRegSequences() {
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DEBUG(dbgs() << "Illegal REG_SEQUENCE instruction:" << *MI);
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llvm_unreachable(0);
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}
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SmallSet<unsigned, 4> Seen;
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for (unsigned i = 1, e = MI->getNumOperands(); i < e; i += 2) {
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unsigned SrcReg = MI->getOperand(i).getReg();
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if (MI->getOperand(i).getSubReg() ||
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@ -1171,6 +1173,23 @@ bool TwoAddressInstructionPass::EliminateRegSequences() {
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DEBUG(dbgs() << "Illegal REG_SEQUENCE instruction:" << *MI);
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llvm_unreachable(0);
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}
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if (!Seen.insert(SrcReg)) {
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// REG_SEQUENCE cannot have duplicated operands. Add a copy.
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const TargetRegisterClass *RC = MRI->getRegClass(SrcReg);
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unsigned NewReg = MRI->createVirtualRegister(RC);
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bool Emitted =
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TII->copyRegToReg(*MI->getParent(), MI, NewReg, SrcReg, RC, RC,
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MI->getDebugLoc());
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(void)Emitted;
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assert(Emitted && "Unable to issue a copy instruction!\n");
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MI->getOperand(i).setReg(NewReg);
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MI->getOperand(i).setIsKill();
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}
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}
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for (unsigned i = 1, e = MI->getNumOperands(); i < e; i += 2) {
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unsigned SrcReg = MI->getOperand(i).getReg();
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unsigned SrcIdx = MI->getOperand(i+1).getImm();
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UpdateRegSequenceSrcs(SrcReg, DstReg, SrcIdx, MRI);
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}
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