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InstCombine: Disable umul.with.overflow recognition for vectors.
It doesn't make a lot on most targets and the code isn't ready for it. PR20113. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211583 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2042,9 +2042,13 @@ static Instruction *ProcessUAddIdiom(Instruction &I, Value *OrigAddV,
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/// replacement required.
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static Instruction *ProcessUMulZExtIdiom(ICmpInst &I, Value *MulVal,
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Value *OtherVal, InstCombiner &IC) {
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// Don't bother doing this transformation for pointers, don't do it for
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// vectors.
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if (!isa<IntegerType>(MulVal->getType()))
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return nullptr;
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assert(I.getOperand(0) == MulVal || I.getOperand(1) == MulVal);
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assert(I.getOperand(0) == OtherVal || I.getOperand(1) == OtherVal);
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assert(isa<IntegerType>(MulVal->getType()));
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Instruction *MulInstr = cast<Instruction>(MulVal);
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assert(MulInstr->getOpcode() == Instruction::Mul);
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@ -162,3 +162,14 @@ entry:
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ret i32 %retval
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}
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define <4 x i32> @pr20113(<4 x i16> %a, <4 x i16> %b) {
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; CHECK-LABEL: @pr20113
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; CHECK-NOT: mul.with.overflow
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; CHECK: ret
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%vmovl.i.i726 = zext <4 x i16> %a to <4 x i32>
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%vmovl.i.i712 = zext <4 x i16> %b to <4 x i32>
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%mul.i703 = mul <4 x i32> %vmovl.i.i712, %vmovl.i.i726
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%tmp = icmp sge <4 x i32> %mul.i703, zeroinitializer
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%vcgez.i = sext <4 x i1> %tmp to <4 x i32>
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ret <4 x i32> %vcgez.i
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}
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