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Fix NEON VLD pseudo instruction itineraries that were incorrectly copied from

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the VST pseudos.  The VLD/VST scheduling still needs work (see pr6722), but
at least we shouldn't confuse the loads with the stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113473 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson 2010-09-09 05:40:26 +00:00
parent ac1a19e18a
commit 0f1e9457a5
2 changed files with 6 additions and 6 deletions
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10
lib/Target/ARM/ARMInstrNEON.td
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@ -170,20 +170,20 @@ let mayLoad = 1, neverHasSideEffects = 1, hasExtraDefRegAllocReq = 1 in {
// Classes for VLD* pseudo-instructions with multi-register operands.
// These are expanded to real instructions after register allocation.
class VLDQPseudo
: PseudoNLdSt<(outs QPR:$dst), (ins addrmode6:$addr), IIC_VST, "">;
: PseudoNLdSt<(outs QPR:$dst), (ins addrmode6:$addr), IIC_VLD2, "">;
class VLDQWBPseudo
: PseudoNLdSt<(outs QPR:$dst, GPR:$wb),
(ins addrmode6:$addr, am6offset:$offset), IIC_VST,
(ins addrmode6:$addr, am6offset:$offset), IIC_VLD2,
"$addr.addr = $wb">;
class VLDQQPseudo
: PseudoNLdSt<(outs QQPR:$dst), (ins addrmode6:$addr), IIC_VST, "">;
: PseudoNLdSt<(outs QQPR:$dst), (ins addrmode6:$addr), IIC_VLD4, "">;
class VLDQQWBPseudo
: PseudoNLdSt<(outs QQPR:$dst, GPR:$wb),
(ins addrmode6:$addr, am6offset:$offset), IIC_VST,
(ins addrmode6:$addr, am6offset:$offset), IIC_VLD4,
"$addr.addr = $wb">;
class VLDQQQQWBPseudo
: PseudoNLdSt<(outs QQQQPR:$dst, GPR:$wb),
(ins addrmode6:$addr, am6offset:$offset, QQQQPR:$src), IIC_VST,
(ins addrmode6:$addr, am6offset:$offset, QQQQPR:$src), IIC_VLD4,
"$addr.addr = $wb, $src = $dst">;
// VLD1 : Vector Load (multiple single elements)

2
test/CodeGen/Thumb2/machine-licm-vdup.ll
View File

@ -12,7 +12,7 @@ entry:
bb1:
; CHECK-NEXT: %bb1
; CHECK: vdup.32 q1, r3
; CHECK: vdup.32 q{{.*}}, r3
%indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %entry ]
%tmp1 = shl i32 %indvar, 2
%gep1 = getelementptr i8* %ptr1, i32 %tmp1