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mirror of https://github.com/RPCS3/llvm.git synced 2025-04-06 07:11:42 +00:00

Remove some more unused stuff from MachineInstr that was leftover from V9.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28091 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-05-04 00:44:25 +00:00
parent 0e57629a93
commit 10f3597c4e
9 changed files with 3 additions and 140 deletions

@ -98,10 +98,8 @@ public:
enum MachineOperandType { enum MachineOperandType {
MO_VirtualRegister, // virtual register for *value MO_VirtualRegister, // virtual register for *value
MO_MachineRegister, // pre-assigned machine register `regNum' MO_MachineRegister, // pre-assigned machine register `regNum'
MO_CCRegister,
MO_SignExtendedImmed, MO_SignExtendedImmed,
MO_UnextendedImmed, MO_UnextendedImmed,
MO_PCRelativeDisp,
MO_MachineBasicBlock, // MachineBasicBlock reference MO_MachineBasicBlock, // MachineBasicBlock reference
MO_FrameIndex, // Abstract Stack Frame Index MO_FrameIndex, // Abstract Stack Frame Index
MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
@ -237,7 +235,6 @@ public:
/// Accessors that tell you what kind of MachineOperand you're looking at. /// Accessors that tell you what kind of MachineOperand you're looking at.
/// ///
bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; } bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
bool isPCRelativeDisp() const { return opType == MO_PCRelativeDisp; }
bool isImmediate() const { bool isImmediate() const {
return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed; return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
} }
@ -251,16 +248,14 @@ public:
/// has one. This is deprecated and only used by the SPARC v9 backend. /// has one. This is deprecated and only used by the SPARC v9 backend.
/// ///
Value* getVRegValueOrNull() const { Value* getVRegValueOrNull() const {
return (opType == MO_VirtualRegister || opType == MO_CCRegister || return opType == MO_VirtualRegister ? contents.value : NULL;
isPCRelativeDisp()) ? contents.value : NULL;
} }
/// MachineOperand accessors that only work on certain types of /// MachineOperand accessors that only work on certain types of
/// MachineOperand... /// MachineOperand...
/// ///
Value* getVRegValue() const { Value* getVRegValue() const {
assert ((opType == MO_VirtualRegister || opType == MO_CCRegister assert(opType == MO_VirtualRegister && "Wrong MachineOperand accessor");
|| isPCRelativeDisp()) && "Wrong MachineOperand accessor");
return contents.value; return contents.value;
} }
int getMachineRegNum() const { int getMachineRegNum() const {
@ -322,8 +317,7 @@ public:
/// ///
bool hasAllocatedReg() const { bool hasAllocatedReg() const {
return (extra.regNum >= 0 && return (extra.regNum >= 0 &&
(opType == MO_VirtualRegister || opType == MO_CCRegister || (opType == MO_VirtualRegister || opType == MO_MachineRegister));
opType == MO_MachineRegister));
} }
/// getReg - Returns the register number. It is a runtime error to call this /// getReg - Returns the register number. It is a runtime error to call this
@ -362,25 +356,6 @@ public:
friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop); friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
/// markHi32, markLo32, etc. - These methods are deprecated and only used by
/// the SPARC v9 back-end.
///
void markHi32() { flags |= HIFLAG32; }
void markLo32() { flags |= LOFLAG32; }
void markHi64() { flags |= HIFLAG64; }
void markLo64() { flags |= LOFLAG64; }
private:
/// setRegForValue - Replaces the Value with its corresponding physical
/// register after register allocation is complete. This is deprecated
/// and only used by the SPARC v9 back-end.
///
void setRegForValue(int reg) {
assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
opType == MO_MachineRegister);
extra.regNum = reg;
}
friend class MachineInstr; friend class MachineInstr;
}; };
@ -507,15 +482,6 @@ public:
UTy, isPCRelative)); UTy, isPCRelative));
} }
void addCCRegOperand(Value *V,
MachineOperand::UseType UTy = MachineOperand::Use) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
operands.push_back(MachineOperand(V, MachineOperand::MO_CCRegister, UTy,
false));
}
/// addRegOperand - Add a symbolic virtual register reference... /// addRegOperand - Add a symbolic virtual register reference...
/// ///
void addRegOperand(int reg, bool isDef) { void addRegOperand(int reg, bool isDef) {
@ -536,15 +502,6 @@ public:
MachineOperand(reg, MachineOperand::MO_VirtualRegister, UTy)); MachineOperand(reg, MachineOperand::MO_VirtualRegister, UTy));
} }
/// addPCDispOperand - Add a PC relative displacement operand to the MI
///
void addPCDispOperand(Value *V) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
operands.push_back(
MachineOperand(V, MachineOperand::MO_PCRelativeDisp,MachineOperand::Use));
}
/// addMachineRegOperand - Add a virtual register operand to this MachineInstr /// addMachineRegOperand - Add a virtual register operand to this MachineInstr
/// ///
void addMachineRegOperand(int reg, bool isDef) { void addMachineRegOperand(int reg, bool isDef) {

@ -55,15 +55,6 @@ public:
return *this; return *this;
} }
/// addReg - Add an LLVM value that is to be used as a register...
///
const MachineInstrBuilder &addCCReg(
Value *V,
MachineOperand::UseType Ty = MachineOperand::Use) const {
MI->addCCRegOperand(V, Ty);
return *this;
}
/// addRegDef - Add an LLVM value that is to be defined as a register... this /// addRegDef - Add an LLVM value that is to be defined as a register... this
/// is the same as addReg(V, MachineOperand::Def). /// is the same as addReg(V, MachineOperand::Def).
/// ///
@ -71,22 +62,6 @@ public:
return addReg(V, MachineOperand::Def); return addReg(V, MachineOperand::Def);
} }
/// addPCDisp - Add an LLVM value to be treated as a PC relative
/// displacement...
///
const MachineInstrBuilder &addPCDisp(Value *V) const {
MI->addPCDispOperand(V);
return *this;
}
/// addMReg - Add a machine register operand...
///
const MachineInstrBuilder &addMReg(int Reg, MachineOperand::UseType Ty
= MachineOperand::Use) const {
MI->addMachineRegOperand(Reg, Ty);
return *this;
}
/// addImm - Add a new immediate operand. /// addImm - Add a new immediate operand.
/// ///
const MachineInstrBuilder &addImm(int Val) const { const MachineInstrBuilder &addImm(int Val) const {

@ -199,14 +199,6 @@ static void print(const MachineOperand &MO, std::ostream &OS,
if (MO.hasAllocatedReg()) if (MO.hasAllocatedReg())
OutputReg(OS, MO.getReg(), MRI); OutputReg(OS, MO.getReg(), MRI);
break; break;
case MachineOperand::MO_CCRegister:
OS << "%ccreg";
OutputValue(OS, MO.getVRegValue());
if (MO.hasAllocatedReg()) {
OS << "==";
OutputReg(OS, MO.getReg(), MRI);
}
break;
case MachineOperand::MO_MachineRegister: case MachineOperand::MO_MachineRegister:
OutputReg(OS, MO.getMachineRegNum(), MRI); OutputReg(OS, MO.getMachineRegNum(), MRI);
break; break;
@ -216,17 +208,6 @@ static void print(const MachineOperand &MO, std::ostream &OS,
case MachineOperand::MO_UnextendedImmed: case MachineOperand::MO_UnextendedImmed:
OS << (long)MO.getImmedValue(); OS << (long)MO.getImmedValue();
break; break;
case MachineOperand::MO_PCRelativeDisp: {
const Value* opVal = MO.getVRegValue();
bool isLabel = isa<Function>(opVal) || isa<BasicBlock>(opVal);
OS << "%disp(" << (isLabel? "label " : "addr-of-val ");
if (opVal->hasName())
OS << opVal->getName();
else
OS << (const void*) opVal;
OS << ")";
break;
}
case MachineOperand::MO_MachineBasicBlock: case MachineOperand::MO_MachineBasicBlock:
OS << "mbb<" OS << "mbb<"
<< ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName() << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
@ -341,14 +322,6 @@ std::ostream &operator<<(std::ostream &OS, const MachineOperand &MO) {
OutputValue(OS, MO.getVRegValue()); OutputValue(OS, MO.getVRegValue());
} }
break; break;
case MachineOperand::MO_CCRegister:
OS << "%ccreg";
OutputValue(OS, MO.getVRegValue());
if (MO.hasAllocatedReg()) {
OS << "==";
OutputReg(OS, MO.getReg());
}
break;
case MachineOperand::MO_MachineRegister: case MachineOperand::MO_MachineRegister:
OutputReg(OS, MO.getMachineRegNum()); OutputReg(OS, MO.getMachineRegNum());
break; break;
@ -358,17 +331,6 @@ std::ostream &operator<<(std::ostream &OS, const MachineOperand &MO) {
case MachineOperand::MO_UnextendedImmed: case MachineOperand::MO_UnextendedImmed:
OS << (long)MO.getImmedValue(); OS << (long)MO.getImmedValue();
break; break;
case MachineOperand::MO_PCRelativeDisp: {
const Value* opVal = MO.getVRegValue();
bool isLabel = isa<Function>(opVal) || isa<BasicBlock>(opVal);
OS << "%disp(" << (isLabel? "label " : "addr-of-val ");
if (opVal->hasName())
OS << opVal->getName();
else
OS << (const void*) opVal;
OS << ")";
break;
}
case MachineOperand::MO_MachineBasicBlock: case MachineOperand::MO_MachineBasicBlock:
OS << "<mbb:" OS << "<mbb:"
<< ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName() << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()

@ -100,7 +100,6 @@ void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
} }
// FALLTHROUGH // FALLTHROUGH
case MachineOperand::MO_MachineRegister: case MachineOperand::MO_MachineRegister:
case MachineOperand::MO_CCRegister:
O << RI.get(MO.getReg()).Name; O << RI.get(MO.getReg()).Name;
return; return;
@ -110,11 +109,6 @@ void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
abort(); abort();
return; return;
case MachineOperand::MO_PCRelativeDisp:
std::cerr << "Shouldn't use addPCDisp() when building Alpha MachineInstrs";
abort();
return;
case MachineOperand::MO_MachineBasicBlock: case MachineOperand::MO_MachineBasicBlock:
printBasicBlockLabel(MO.getMachineBasicBlock()); printBasicBlockLabel(MO.getMachineBasicBlock());
return; return;

@ -180,10 +180,8 @@ void IA64AsmPrinter::printOp(const MachineOperand &MO,
} }
// FALLTHROUGH // FALLTHROUGH
case MachineOperand::MO_MachineRegister: case MachineOperand::MO_MachineRegister:
case MachineOperand::MO_CCRegister: {
O << RI.get(MO.getReg()).Name; O << RI.get(MO.getReg()).Name;
return; return;
}
case MachineOperand::MO_SignExtendedImmed: case MachineOperand::MO_SignExtendedImmed:
case MachineOperand::MO_UnextendedImmed: case MachineOperand::MO_UnextendedImmed:
@ -192,11 +190,6 @@ void IA64AsmPrinter::printOp(const MachineOperand &MO,
case MachineOperand::MO_MachineBasicBlock: case MachineOperand::MO_MachineBasicBlock:
printBasicBlockLabel(MO.getMachineBasicBlock()); printBasicBlockLabel(MO.getMachineBasicBlock());
return; return;
case MachineOperand::MO_PCRelativeDisp:
std::cerr << "Shouldn't use addPCDisp() when building IA64 MachineInstrs";
abort ();
return;
case MachineOperand::MO_ConstantPoolIndex: { case MachineOperand::MO_ConstantPoolIndex: {
O << "@gprel(" << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_" O << "@gprel(" << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_"
<< MO.getConstantPoolIndex() << ")"; << MO.getConstantPoolIndex() << ")";

@ -360,7 +360,6 @@ void PPCAsmPrinter::printOp(const MachineOperand &MO) {
} }
// FALLTHROUGH // FALLTHROUGH
case MachineOperand::MO_MachineRegister: case MachineOperand::MO_MachineRegister:
case MachineOperand::MO_CCRegister:
O << RI.get(MO.getReg()).Name; O << RI.get(MO.getReg()).Name;
return; return;
@ -370,11 +369,6 @@ void PPCAsmPrinter::printOp(const MachineOperand &MO) {
abort(); abort();
return; return;
case MachineOperand::MO_PCRelativeDisp:
std::cerr << "Shouldn't use addPCDisp() when building PPC MachineInstrs";
abort();
return;
case MachineOperand::MO_MachineBasicBlock: case MachineOperand::MO_MachineBasicBlock:
printBasicBlockLabel(MO.getMachineBasicBlock()); printBasicBlockLabel(MO.getMachineBasicBlock());
return; return;

@ -166,10 +166,6 @@ void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
case MachineOperand::MO_MachineBasicBlock: case MachineOperand::MO_MachineBasicBlock:
printBasicBlockLabel(MO.getMachineBasicBlock()); printBasicBlockLabel(MO.getMachineBasicBlock());
return; return;
case MachineOperand::MO_PCRelativeDisp:
std::cerr << "Shouldn't use addPCDisp() when building Sparc MachineInstrs";
abort ();
return;
case MachineOperand::MO_GlobalAddress: case MachineOperand::MO_GlobalAddress:
O << Mang->getValueName(MO.getGlobal()); O << Mang->getValueName(MO.getGlobal());
break; break;

@ -126,10 +126,6 @@ void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
case MachineOperand::MO_MachineBasicBlock: case MachineOperand::MO_MachineBasicBlock:
printBasicBlockLabel(MO.getMachineBasicBlock()); printBasicBlockLabel(MO.getMachineBasicBlock());
return; return;
case MachineOperand::MO_PCRelativeDisp:
std::cerr << "Shouldn't use addPCDisp() when building X86 MachineInstrs";
abort ();
return;
case MachineOperand::MO_JumpTableIndex: { case MachineOperand::MO_JumpTableIndex: {
bool isMemOp = Modifier && !strcmp(Modifier, "mem"); bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (!isMemOp) O << '$'; if (!isMemOp) O << '$';

@ -134,10 +134,6 @@ void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
case MachineOperand::MO_MachineBasicBlock: case MachineOperand::MO_MachineBasicBlock:
printBasicBlockLabel(MO.getMachineBasicBlock()); printBasicBlockLabel(MO.getMachineBasicBlock());
return; return;
case MachineOperand::MO_PCRelativeDisp:
assert(0 && "Shouldn't use addPCDisp() when building X86 MachineInstrs");
abort ();
return;
case MachineOperand::MO_ConstantPoolIndex: { case MachineOperand::MO_ConstantPoolIndex: {
bool isMemOp = Modifier && !strcmp(Modifier, "mem"); bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (!isMemOp) O << "OFFSET "; if (!isMemOp) O << "OFFSET ";