mirror of
https://github.com/RPCS3/llvm.git
synced 2025-04-06 07:11:42 +00:00
Remove some more unused stuff from MachineInstr that was leftover from V9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28091 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
0e57629a93
commit
10f3597c4e
include/llvm/CodeGen
lib
CodeGen
Target
@ -98,10 +98,8 @@ public:
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enum MachineOperandType {
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enum MachineOperandType {
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MO_VirtualRegister, // virtual register for *value
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MO_VirtualRegister, // virtual register for *value
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MO_MachineRegister, // pre-assigned machine register `regNum'
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MO_MachineRegister, // pre-assigned machine register `regNum'
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MO_CCRegister,
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MO_SignExtendedImmed,
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MO_SignExtendedImmed,
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MO_UnextendedImmed,
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MO_UnextendedImmed,
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MO_PCRelativeDisp,
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MO_MachineBasicBlock, // MachineBasicBlock reference
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MO_MachineBasicBlock, // MachineBasicBlock reference
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MO_FrameIndex, // Abstract Stack Frame Index
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MO_FrameIndex, // Abstract Stack Frame Index
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MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
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MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
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@ -237,7 +235,6 @@ public:
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/// Accessors that tell you what kind of MachineOperand you're looking at.
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/// Accessors that tell you what kind of MachineOperand you're looking at.
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///
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///
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bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
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bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
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bool isPCRelativeDisp() const { return opType == MO_PCRelativeDisp; }
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bool isImmediate() const {
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bool isImmediate() const {
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return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
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return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
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}
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}
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@ -251,16 +248,14 @@ public:
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/// has one. This is deprecated and only used by the SPARC v9 backend.
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/// has one. This is deprecated and only used by the SPARC v9 backend.
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///
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///
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Value* getVRegValueOrNull() const {
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Value* getVRegValueOrNull() const {
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return (opType == MO_VirtualRegister || opType == MO_CCRegister ||
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return opType == MO_VirtualRegister ? contents.value : NULL;
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isPCRelativeDisp()) ? contents.value : NULL;
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}
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}
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/// MachineOperand accessors that only work on certain types of
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/// MachineOperand accessors that only work on certain types of
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/// MachineOperand...
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/// MachineOperand...
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///
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///
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Value* getVRegValue() const {
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Value* getVRegValue() const {
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assert ((opType == MO_VirtualRegister || opType == MO_CCRegister
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assert(opType == MO_VirtualRegister && "Wrong MachineOperand accessor");
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|| isPCRelativeDisp()) && "Wrong MachineOperand accessor");
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return contents.value;
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return contents.value;
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}
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}
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int getMachineRegNum() const {
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int getMachineRegNum() const {
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@ -322,8 +317,7 @@ public:
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///
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///
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bool hasAllocatedReg() const {
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bool hasAllocatedReg() const {
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return (extra.regNum >= 0 &&
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return (extra.regNum >= 0 &&
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(opType == MO_VirtualRegister || opType == MO_CCRegister ||
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(opType == MO_VirtualRegister || opType == MO_MachineRegister));
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opType == MO_MachineRegister));
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}
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}
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/// getReg - Returns the register number. It is a runtime error to call this
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/// getReg - Returns the register number. It is a runtime error to call this
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@ -362,25 +356,6 @@ public:
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friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
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friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
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/// markHi32, markLo32, etc. - These methods are deprecated and only used by
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/// the SPARC v9 back-end.
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///
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void markHi32() { flags |= HIFLAG32; }
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void markLo32() { flags |= LOFLAG32; }
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void markHi64() { flags |= HIFLAG64; }
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void markLo64() { flags |= LOFLAG64; }
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private:
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/// setRegForValue - Replaces the Value with its corresponding physical
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/// register after register allocation is complete. This is deprecated
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/// and only used by the SPARC v9 back-end.
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///
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void setRegForValue(int reg) {
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assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
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opType == MO_MachineRegister);
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extra.regNum = reg;
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}
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friend class MachineInstr;
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friend class MachineInstr;
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};
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};
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@ -507,15 +482,6 @@ public:
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UTy, isPCRelative));
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UTy, isPCRelative));
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}
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}
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void addCCRegOperand(Value *V,
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MachineOperand::UseType UTy = MachineOperand::Use) {
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assert(!OperandsComplete() &&
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"Trying to add an operand to a machine instr that is already done!");
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operands.push_back(MachineOperand(V, MachineOperand::MO_CCRegister, UTy,
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false));
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}
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/// addRegOperand - Add a symbolic virtual register reference...
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/// addRegOperand - Add a symbolic virtual register reference...
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///
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///
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void addRegOperand(int reg, bool isDef) {
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void addRegOperand(int reg, bool isDef) {
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@ -536,15 +502,6 @@ public:
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MachineOperand(reg, MachineOperand::MO_VirtualRegister, UTy));
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MachineOperand(reg, MachineOperand::MO_VirtualRegister, UTy));
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}
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}
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/// addPCDispOperand - Add a PC relative displacement operand to the MI
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///
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void addPCDispOperand(Value *V) {
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assert(!OperandsComplete() &&
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"Trying to add an operand to a machine instr that is already done!");
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operands.push_back(
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MachineOperand(V, MachineOperand::MO_PCRelativeDisp,MachineOperand::Use));
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}
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/// addMachineRegOperand - Add a virtual register operand to this MachineInstr
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/// addMachineRegOperand - Add a virtual register operand to this MachineInstr
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///
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///
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void addMachineRegOperand(int reg, bool isDef) {
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void addMachineRegOperand(int reg, bool isDef) {
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@ -55,15 +55,6 @@ public:
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return *this;
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return *this;
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}
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}
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/// addReg - Add an LLVM value that is to be used as a register...
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///
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const MachineInstrBuilder &addCCReg(
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Value *V,
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MachineOperand::UseType Ty = MachineOperand::Use) const {
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MI->addCCRegOperand(V, Ty);
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return *this;
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}
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/// addRegDef - Add an LLVM value that is to be defined as a register... this
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/// addRegDef - Add an LLVM value that is to be defined as a register... this
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/// is the same as addReg(V, MachineOperand::Def).
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/// is the same as addReg(V, MachineOperand::Def).
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///
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///
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@ -71,22 +62,6 @@ public:
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return addReg(V, MachineOperand::Def);
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return addReg(V, MachineOperand::Def);
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}
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}
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/// addPCDisp - Add an LLVM value to be treated as a PC relative
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/// displacement...
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///
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const MachineInstrBuilder &addPCDisp(Value *V) const {
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MI->addPCDispOperand(V);
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return *this;
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}
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/// addMReg - Add a machine register operand...
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///
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const MachineInstrBuilder &addMReg(int Reg, MachineOperand::UseType Ty
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= MachineOperand::Use) const {
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MI->addMachineRegOperand(Reg, Ty);
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return *this;
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}
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/// addImm - Add a new immediate operand.
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/// addImm - Add a new immediate operand.
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///
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///
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const MachineInstrBuilder &addImm(int Val) const {
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const MachineInstrBuilder &addImm(int Val) const {
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@ -199,14 +199,6 @@ static void print(const MachineOperand &MO, std::ostream &OS,
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if (MO.hasAllocatedReg())
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if (MO.hasAllocatedReg())
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OutputReg(OS, MO.getReg(), MRI);
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OutputReg(OS, MO.getReg(), MRI);
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break;
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break;
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case MachineOperand::MO_CCRegister:
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OS << "%ccreg";
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OutputValue(OS, MO.getVRegValue());
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if (MO.hasAllocatedReg()) {
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OS << "==";
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OutputReg(OS, MO.getReg(), MRI);
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}
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break;
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case MachineOperand::MO_MachineRegister:
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case MachineOperand::MO_MachineRegister:
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OutputReg(OS, MO.getMachineRegNum(), MRI);
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OutputReg(OS, MO.getMachineRegNum(), MRI);
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break;
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break;
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@ -216,17 +208,6 @@ static void print(const MachineOperand &MO, std::ostream &OS,
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case MachineOperand::MO_UnextendedImmed:
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case MachineOperand::MO_UnextendedImmed:
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OS << (long)MO.getImmedValue();
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OS << (long)MO.getImmedValue();
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break;
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break;
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case MachineOperand::MO_PCRelativeDisp: {
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const Value* opVal = MO.getVRegValue();
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bool isLabel = isa<Function>(opVal) || isa<BasicBlock>(opVal);
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OS << "%disp(" << (isLabel? "label " : "addr-of-val ");
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if (opVal->hasName())
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OS << opVal->getName();
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else
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OS << (const void*) opVal;
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OS << ")";
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break;
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}
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case MachineOperand::MO_MachineBasicBlock:
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case MachineOperand::MO_MachineBasicBlock:
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OS << "mbb<"
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OS << "mbb<"
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<< ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
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<< ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
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@ -341,14 +322,6 @@ std::ostream &operator<<(std::ostream &OS, const MachineOperand &MO) {
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OutputValue(OS, MO.getVRegValue());
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OutputValue(OS, MO.getVRegValue());
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}
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}
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break;
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break;
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case MachineOperand::MO_CCRegister:
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OS << "%ccreg";
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OutputValue(OS, MO.getVRegValue());
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if (MO.hasAllocatedReg()) {
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OS << "==";
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OutputReg(OS, MO.getReg());
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}
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break;
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case MachineOperand::MO_MachineRegister:
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case MachineOperand::MO_MachineRegister:
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OutputReg(OS, MO.getMachineRegNum());
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OutputReg(OS, MO.getMachineRegNum());
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break;
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break;
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@ -358,17 +331,6 @@ std::ostream &operator<<(std::ostream &OS, const MachineOperand &MO) {
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case MachineOperand::MO_UnextendedImmed:
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case MachineOperand::MO_UnextendedImmed:
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OS << (long)MO.getImmedValue();
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OS << (long)MO.getImmedValue();
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break;
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break;
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case MachineOperand::MO_PCRelativeDisp: {
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const Value* opVal = MO.getVRegValue();
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bool isLabel = isa<Function>(opVal) || isa<BasicBlock>(opVal);
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OS << "%disp(" << (isLabel? "label " : "addr-of-val ");
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if (opVal->hasName())
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OS << opVal->getName();
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else
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OS << (const void*) opVal;
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OS << ")";
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break;
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}
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case MachineOperand::MO_MachineBasicBlock:
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case MachineOperand::MO_MachineBasicBlock:
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OS << "<mbb:"
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OS << "<mbb:"
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<< ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
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<< ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
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@ -100,7 +100,6 @@ void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
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}
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}
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// FALLTHROUGH
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// FALLTHROUGH
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case MachineOperand::MO_MachineRegister:
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case MachineOperand::MO_MachineRegister:
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case MachineOperand::MO_CCRegister:
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O << RI.get(MO.getReg()).Name;
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O << RI.get(MO.getReg()).Name;
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return;
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return;
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@ -110,11 +109,6 @@ void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
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abort();
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abort();
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return;
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return;
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case MachineOperand::MO_PCRelativeDisp:
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std::cerr << "Shouldn't use addPCDisp() when building Alpha MachineInstrs";
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abort();
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return;
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case MachineOperand::MO_MachineBasicBlock:
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case MachineOperand::MO_MachineBasicBlock:
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printBasicBlockLabel(MO.getMachineBasicBlock());
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printBasicBlockLabel(MO.getMachineBasicBlock());
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return;
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return;
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@ -180,10 +180,8 @@ void IA64AsmPrinter::printOp(const MachineOperand &MO,
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}
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}
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// FALLTHROUGH
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// FALLTHROUGH
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case MachineOperand::MO_MachineRegister:
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case MachineOperand::MO_MachineRegister:
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case MachineOperand::MO_CCRegister: {
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O << RI.get(MO.getReg()).Name;
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O << RI.get(MO.getReg()).Name;
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return;
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return;
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}
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case MachineOperand::MO_SignExtendedImmed:
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case MachineOperand::MO_SignExtendedImmed:
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case MachineOperand::MO_UnextendedImmed:
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case MachineOperand::MO_UnextendedImmed:
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@ -192,11 +190,6 @@ void IA64AsmPrinter::printOp(const MachineOperand &MO,
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case MachineOperand::MO_MachineBasicBlock:
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case MachineOperand::MO_MachineBasicBlock:
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printBasicBlockLabel(MO.getMachineBasicBlock());
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printBasicBlockLabel(MO.getMachineBasicBlock());
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return;
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return;
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case MachineOperand::MO_PCRelativeDisp:
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std::cerr << "Shouldn't use addPCDisp() when building IA64 MachineInstrs";
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abort ();
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return;
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case MachineOperand::MO_ConstantPoolIndex: {
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case MachineOperand::MO_ConstantPoolIndex: {
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O << "@gprel(" << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_"
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O << "@gprel(" << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_"
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<< MO.getConstantPoolIndex() << ")";
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<< MO.getConstantPoolIndex() << ")";
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@ -360,7 +360,6 @@ void PPCAsmPrinter::printOp(const MachineOperand &MO) {
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}
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}
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// FALLTHROUGH
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// FALLTHROUGH
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case MachineOperand::MO_MachineRegister:
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case MachineOperand::MO_MachineRegister:
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case MachineOperand::MO_CCRegister:
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O << RI.get(MO.getReg()).Name;
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O << RI.get(MO.getReg()).Name;
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return;
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return;
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@ -370,11 +369,6 @@ void PPCAsmPrinter::printOp(const MachineOperand &MO) {
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abort();
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abort();
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return;
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return;
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case MachineOperand::MO_PCRelativeDisp:
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std::cerr << "Shouldn't use addPCDisp() when building PPC MachineInstrs";
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abort();
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return;
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case MachineOperand::MO_MachineBasicBlock:
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case MachineOperand::MO_MachineBasicBlock:
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printBasicBlockLabel(MO.getMachineBasicBlock());
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printBasicBlockLabel(MO.getMachineBasicBlock());
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return;
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return;
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@ -166,10 +166,6 @@ void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
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case MachineOperand::MO_MachineBasicBlock:
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case MachineOperand::MO_MachineBasicBlock:
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printBasicBlockLabel(MO.getMachineBasicBlock());
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printBasicBlockLabel(MO.getMachineBasicBlock());
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return;
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return;
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case MachineOperand::MO_PCRelativeDisp:
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std::cerr << "Shouldn't use addPCDisp() when building Sparc MachineInstrs";
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abort ();
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return;
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case MachineOperand::MO_GlobalAddress:
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case MachineOperand::MO_GlobalAddress:
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O << Mang->getValueName(MO.getGlobal());
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O << Mang->getValueName(MO.getGlobal());
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break;
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break;
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@ -126,10 +126,6 @@ void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
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case MachineOperand::MO_MachineBasicBlock:
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case MachineOperand::MO_MachineBasicBlock:
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printBasicBlockLabel(MO.getMachineBasicBlock());
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printBasicBlockLabel(MO.getMachineBasicBlock());
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return;
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return;
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case MachineOperand::MO_PCRelativeDisp:
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std::cerr << "Shouldn't use addPCDisp() when building X86 MachineInstrs";
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abort ();
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return;
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case MachineOperand::MO_JumpTableIndex: {
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case MachineOperand::MO_JumpTableIndex: {
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bool isMemOp = Modifier && !strcmp(Modifier, "mem");
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bool isMemOp = Modifier && !strcmp(Modifier, "mem");
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if (!isMemOp) O << '$';
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if (!isMemOp) O << '$';
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@ -134,10 +134,6 @@ void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
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case MachineOperand::MO_MachineBasicBlock:
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case MachineOperand::MO_MachineBasicBlock:
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printBasicBlockLabel(MO.getMachineBasicBlock());
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printBasicBlockLabel(MO.getMachineBasicBlock());
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return;
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return;
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case MachineOperand::MO_PCRelativeDisp:
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assert(0 && "Shouldn't use addPCDisp() when building X86 MachineInstrs");
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abort ();
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return;
|
|
||||||
case MachineOperand::MO_ConstantPoolIndex: {
|
case MachineOperand::MO_ConstantPoolIndex: {
|
||||||
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
|
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
|
||||||
if (!isMemOp) O << "OFFSET ";
|
if (!isMemOp) O << "OFFSET ";
|
||||||
|
Loading…
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Reference in New Issue
Block a user