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[InstCombine] use m_APInt to allow icmp (shl 1, Y), C folds for splat constant vectors

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279266 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sanjay Patel 2016-08-19 16:12:16 +00:00
parent 66e19711ac
commit 1238f8d56b
2 changed files with 13 additions and 28 deletions
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9
lib/Transforms/InstCombine/InstCombineCompares.cpp
View File

@ -1988,15 +1988,16 @@ static Instruction *foldICmpShlOne(ICmpInst &Cmp, Instruction *Shl,
Instruction *InstCombiner::foldICmpShlConstant(ICmpInst &ICI, Instruction *LHSI,
const APInt *RHSV) {
// FIXME: This should use m_APInt to allow splat vectors.
ConstantInt *ShAmt = dyn_cast<ConstantInt>(LHSI->getOperand(1));
if (!ShAmt)
return foldICmpShlOne(ICI, LHSI, RHSV);
// FIXME: This check restricts all folds under here to scalar types.
ConstantInt *RHS = dyn_cast<ConstantInt>(ICI.getOperand(1));
if (!RHS)
return nullptr;
ConstantInt *ShAmt = dyn_cast<ConstantInt>(LHSI->getOperand(1));
if (!ShAmt)
return foldICmpShlOne(ICI, LHSI, RHSV);
// Check that the shift amount is in range. If not, don't perform
// undefined shifts. When the shift is visited it will be
// simplified.

32
test/Transforms/InstCombine/icmp.ll
View File

@ -1536,11 +1536,9 @@ define i1 @icmp_shl_1_V_ult_32(i32 %V) {
ret i1 %cmp
}
; FIXME: Vectors should fold too.
define <2 x i1> @icmp_shl_1_V_ult_32_vec(<2 x i32> %V) {
; CHECK-LABEL: @icmp_shl_1_V_ult_32_vec(
; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> <i32 1, i32 1>, %V
; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[SHL]], <i32 32, i32 32>
; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> %V, <i32 5, i32 5>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %V
@ -1558,11 +1556,9 @@ define i1 @icmp_shl_1_V_eq_32(i32 %V) {
ret i1 %cmp
}
; FIXME: Vectors should fold too.
define <2 x i1> @icmp_shl_1_V_eq_32_vec(<2 x i32> %V) {
; CHECK-LABEL: @icmp_shl_1_V_eq_32_vec(
; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> <i32 1, i32 1>, %V
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[SHL]], <i32 32, i32 32>
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> %V, <i32 5, i32 5>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %V
@ -1580,11 +1576,9 @@ define i1 @icmp_shl_1_V_ult_30(i32 %V) {
ret i1 %cmp
}
; FIXME: Vectors should fold too.
define <2 x i1> @icmp_shl_1_V_ult_30_vec(<2 x i32> %V) {
; CHECK-LABEL: @icmp_shl_1_V_ult_30_vec(
; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> <i32 1, i32 1>, %V
; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[SHL]], <i32 30, i32 30>
; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> %V, <i32 5, i32 5>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %V
@ -1602,11 +1596,9 @@ define i1 @icmp_shl_1_V_ugt_30(i32 %V) {
ret i1 %cmp
}
; FIXME: Vectors should fold too.
define <2 x i1> @icmp_shl_1_V_ugt_30_vec(<2 x i32> %V) {
; CHECK-LABEL: @icmp_shl_1_V_ugt_30_vec(
; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> <i32 1, i32 1>, %V
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[SHL]], <i32 30, i32 30>
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> %V, <i32 4, i32 4>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %V
@ -1624,11 +1616,9 @@ define i1 @icmp_shl_1_V_ule_30(i32 %V) {
ret i1 %cmp
}
; FIXME: Vectors should fold too.
define <2 x i1> @icmp_shl_1_V_ule_30_vec(<2 x i32> %V) {
; CHECK-LABEL: @icmp_shl_1_V_ule_30_vec(
; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> <i32 1, i32 1>, %V
; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[SHL]], <i32 31, i32 31>
; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> %V, <i32 5, i32 5>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %V
@ -1646,11 +1636,9 @@ define i1 @icmp_shl_1_V_uge_30(i32 %V) {
ret i1 %cmp
}
; FIXME: Vectors should fold too.
define <2 x i1> @icmp_shl_1_V_uge_30_vec(<2 x i32> %V) {
; CHECK-LABEL: @icmp_shl_1_V_uge_30_vec(
; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> <i32 1, i32 1>, %V
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[SHL]], <i32 29, i32 29>
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> %V, <i32 4, i32 4>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %V
@ -1668,11 +1656,9 @@ define i1 @icmp_shl_1_V_uge_2147483648(i32 %V) {
ret i1 %cmp
}
; FIXME: Vectors should fold too.
define <2 x i1> @icmp_shl_1_V_uge_2147483648_vec(<2 x i32> %V) {
; CHECK-LABEL: @icmp_shl_1_V_uge_2147483648_vec(
; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> <i32 1, i32 1>, %V
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[SHL]], zeroinitializer
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> %V, <i32 31, i32 31>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %V
@ -1690,11 +1676,9 @@ define i1 @icmp_shl_1_V_ult_2147483648(i32 %V) {
ret i1 %cmp
}
; FIXME: Vectors should fold too.
define <2 x i1> @icmp_shl_1_V_ult_2147483648_vec(<2 x i32> %V) {
; CHECK-LABEL: @icmp_shl_1_V_ult_2147483648_vec(
; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> <i32 1, i32 1>, %V
; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[SHL]], <i32 -2147483648, i32 -2147483648>
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> %V, <i32 31, i32 31>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%shl = shl <2 x i32> <i32 1, i32 1>, %V