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Implement varargs and returnaddress/frameaddress intrinsics. With this
patch, all of SingleSource/UnitTests passes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19408 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -32,6 +32,7 @@ using namespace llvm;
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namespace {
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class X86TargetLowering : public TargetLowering {
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int VarArgsFrameIndex; // FrameIndex for start of varargs area.
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int ReturnAddrIndex; // FrameIndex for return slot.
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public:
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X86TargetLowering(TargetMachine &TM) : TargetLowering(TM) {
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// Set up the TargetLowering object.
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@ -67,6 +68,17 @@ namespace {
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virtual std::pair<SDOperand, SDOperand>
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LowerCallTo(SDOperand Chain, const Type *RetTy, SDOperand Callee,
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ArgListTy &Args, SelectionDAG &DAG);
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virtual std::pair<SDOperand, SDOperand>
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LowerVAStart(SDOperand Chain, SelectionDAG &DAG);
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virtual std::pair<SDOperand,SDOperand>
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LowerVAArgNext(bool isVANext, SDOperand Chain, SDOperand VAList,
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const Type *ArgTy, SelectionDAG &DAG);
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virtual std::pair<SDOperand, SDOperand>
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LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth,
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SelectionDAG &DAG);
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};
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}
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@ -127,7 +139,7 @@ X86TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
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// the start of the first vararg value... for expansion of llvm.va_start.
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if (F.isVarArg())
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VarArgsFrameIndex = MFI->CreateFixedObject(1, ArgOffset);
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ReturnAddrIndex = 0; // No return address slot generated yet.
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return ArgValues;
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}
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@ -214,6 +226,59 @@ X86TargetLowering::LowerCallTo(SDOperand Chain,
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return std::make_pair(TheCall, Chain);
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}
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std::pair<SDOperand, SDOperand>
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X86TargetLowering::LowerVAStart(SDOperand Chain, SelectionDAG &DAG) {
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// vastart just returns the address of the VarArgsFrameIndex slot.
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return std::make_pair(DAG.getFrameIndex(VarArgsFrameIndex, MVT::i32), Chain);
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}
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std::pair<SDOperand,SDOperand> X86TargetLowering::
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LowerVAArgNext(bool isVANext, SDOperand Chain, SDOperand VAList,
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const Type *ArgTy, SelectionDAG &DAG) {
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MVT::ValueType ArgVT = getValueType(ArgTy);
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SDOperand Result;
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if (!isVANext) {
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Result = DAG.getLoad(ArgVT, DAG.getEntryNode(), VAList);
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} else {
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unsigned Amt;
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if (ArgVT == MVT::i32)
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Amt = 4;
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else {
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assert((ArgVT == MVT::i64 || ArgVT == MVT::f64) &&
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"Other types should have been promoted for varargs!");
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Amt = 8;
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}
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Result = DAG.getNode(ISD::ADD, VAList.getValueType(), VAList,
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DAG.getConstant(Amt, VAList.getValueType()));
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}
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return std::make_pair(Result, Chain);
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}
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std::pair<SDOperand, SDOperand> X86TargetLowering::
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LowerFrameReturnAddress(bool isFrameAddress, SDOperand Chain, unsigned Depth,
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SelectionDAG &DAG) {
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SDOperand Result;
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if (Depth) // Depths > 0 not supported yet!
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Result = DAG.getConstant(0, getPointerTy());
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else {
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if (ReturnAddrIndex == 0) {
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// Set up a frame object for the return address.
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MachineFunction &MF = DAG.getMachineFunction();
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ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject(4, -4);
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}
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SDOperand RetAddrFI = DAG.getFrameIndex(ReturnAddrIndex, MVT::i32);
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if (!isFrameAddress)
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// Just load the return address
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Result = DAG.getLoad(MVT::i32, DAG.getEntryNode(), RetAddrFI);
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else
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Result = DAG.getNode(ISD::SUB, MVT::i32, RetAddrFI,
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DAG.getConstant(4, MVT::i32));
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}
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return std::make_pair(Result, Chain);
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}
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