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Re-apply 72756 with fixes. One of those was introduced by we changed MachineInstrBuilder::addReg() interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72826 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -530,7 +530,7 @@ static bool mergeBaseUpdateLoadStore(MachineBasicBlock &MBB,
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if (isAM2)
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if (isAM2)
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// STR_PRE, STR_POST;
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// STR_PRE, STR_POST;
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BuildMI(MBB, MBBI, dl, TII->get(NewOpc), Base)
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BuildMI(MBB, MBBI, dl, TII->get(NewOpc), Base)
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.addReg(MO.getReg(), getKillRegState(BaseKill))
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.addReg(MO.getReg(), getKillRegState(MO.isKill()))
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.addReg(Base).addReg(0).addImm(Offset).addImm(Pred).addReg(PredReg);
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.addReg(Base).addReg(0).addImm(Offset).addImm(Pred).addReg(PredReg);
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else
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else
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// FSTMS, FSTMD
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// FSTMS, FSTMD
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@ -709,6 +709,13 @@ bool ARMLoadStoreOpt::LoadStoreMultipleOpti(MachineBasicBlock &MBB) {
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// RS may be pointing to an instruction that's deleted.
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// RS may be pointing to an instruction that's deleted.
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RS->skipTo(prior(MBBI));
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RS->skipTo(prior(MBBI));
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} else if (NumMemOps == 1) {
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// Try folding preceeding/trailing base inc/dec into the single
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// load/store.
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if (mergeBaseUpdateLoadStore(MBB, MemOps[0].MBBI, TII, Advance, MBBI)) {
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++NumMerges;
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RS->forward(prior(MBBI));
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}
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}
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}
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CurrBase = 0;
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CurrBase = 0;
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@ -1,6 +1,5 @@
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; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnu | grep {str.*\\!}
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; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnu | grep {str.*\\!}
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; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnu | grep {ldr.*\\\[.*\], #+4}
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; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnu | grep {ldr.*\\\[.*\], #+4}
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; XFAIL: *
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@b = external global i64*
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@b = external global i64*
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