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[X86][SSE] SimplifyDemandedBitsForTargetNode - PCMPGT(0,X) sign mask

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For PCMPGT(0, X) patterns where we only demand the sign bit (e.g. BLENDV or MOVMSK) then we can use X directly.

Differential Revision: https://reviews.llvm.org/D57667

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353051 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Pilgrim 2019-02-04 15:43:36 +00:00
parent 5e786f3ff1
commit 152f9e6296
7 changed files with 17 additions and 48 deletions
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7
lib/Target/X86/X86ISelLowering.cpp
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@ -33070,6 +33070,13 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
}
break;
}
case X86ISD::PCMPGT:
// icmp sgt(0, R) == ashr(R, BitWidth-1).
// iff we only need the sign bit then we can use R directly.
if (OriginalDemandedBits.isSignMask() &&
ISD::isBuildVectorAllZeros(Op.getOperand(0).getNode()))
return TLO.CombineTo(Op, Op.getOperand(1));
break;
case X86ISD::MOVMSK: {
SDValue Src = Op.getOperand(0);
MVT SrcVT = Src.getSimpleValueType();

4
test/CodeGen/X86/avx512-cvt-widen.ll
View File

@ -1909,8 +1909,6 @@ define <8 x float> @ubto8f32(<8 x i32> %a) {
define <8 x double> @ubto8f64(<8 x i32> %a) {
; ALL-LABEL: ubto8f64:
; ALL: # %bb.0:
; ALL-NEXT: vpxor %xmm1, %xmm1, %xmm1
; ALL-NEXT: vpcmpgtd %ymm0, %ymm1, %ymm0
; ALL-NEXT: vpsrld $31, %ymm0, %ymm0
; ALL-NEXT: vcvtdq2pd %ymm0, %zmm0
; ALL-NEXT: retq
@ -1942,8 +1940,6 @@ define <4 x float> @ubto4f32(<4 x i32> %a) {
define <4 x double> @ubto4f64(<4 x i32> %a) {
; ALL-LABEL: ubto4f64:
; ALL: # %bb.0:
; ALL-NEXT: vpxor %xmm1, %xmm1, %xmm1
; ALL-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
; ALL-NEXT: vpsrld $31, %xmm0, %xmm0
; ALL-NEXT: vcvtdq2pd %xmm0, %ymm0
; ALL-NEXT: retq

4
test/CodeGen/X86/avx512-cvt.ll
View File

@ -1897,8 +1897,6 @@ define <8 x float> @ubto8f32(<8 x i32> %a) {
define <8 x double> @ubto8f64(<8 x i32> %a) {
; ALL-LABEL: ubto8f64:
; ALL: # %bb.0:
; ALL-NEXT: vpxor %xmm1, %xmm1, %xmm1
; ALL-NEXT: vpcmpgtd %ymm0, %ymm1, %ymm0
; ALL-NEXT: vpsrld $31, %ymm0, %ymm0
; ALL-NEXT: vcvtdq2pd %ymm0, %zmm0
; ALL-NEXT: retq
@ -1930,8 +1928,6 @@ define <4 x float> @ubto4f32(<4 x i32> %a) {
define <4 x double> @ubto4f64(<4 x i32> %a) {
; ALL-LABEL: ubto4f64:
; ALL: # %bb.0:
; ALL-NEXT: vpxor %xmm1, %xmm1, %xmm1
; ALL-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
; ALL-NEXT: vpsrld $31, %xmm0, %xmm0
; ALL-NEXT: vcvtdq2pd %xmm0, %ymm0
; ALL-NEXT: retq

3
test/CodeGen/X86/bitcast-setcc-128.ll
View File

@ -683,9 +683,6 @@ define i64 @v16i8_widened_with_ones(<16 x i8> %a, <16 x i8> %b) {
; AVX1: # %bb.0: # %entry
; AVX1-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %ecx
; AVX1-NEXT: orl $-65536, %ecx # imm = 0xFFFF0000
; AVX1-NEXT: movabsq $-4294967296, %rax # imm = 0xFFFFFFFF00000000

5
test/CodeGen/X86/bitcast-setcc-256.ll
View File

@ -314,11 +314,8 @@ define void @bitcast_32i8_store(i32* %p, <32 x i8> %a0) {
;
; AVX1-LABEL: bitcast_32i8_store:
; AVX1: # %bb.0:
; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm2
; AVX1-NEXT: vpmovmskb %xmm2, %eax
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %ecx
; AVX1-NEXT: shll $16, %ecx
; AVX1-NEXT: orl %eax, %ecx

9
test/CodeGen/X86/bitcast-setcc-512.ll
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@ -418,18 +418,13 @@ define void @bitcast_64i8_store(i64* %p, <64 x i8> %a0) {
;
; AVX1-LABEL: bitcast_64i8_store:
; AVX1: # %bb.0:
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm2, %xmm3
; AVX1-NEXT: vpmovmskb %xmm3, %eax
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm2, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %ecx
; AVX1-NEXT: shll $16, %ecx
; AVX1-NEXT: orl %eax, %ecx
; AVX1-NEXT: vpcmpgtb %xmm1, %xmm2, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: vpmovmskb %xmm1, %eax
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm0
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm2, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %edx
; AVX1-NEXT: shll $16, %edx
; AVX1-NEXT: orl %eax, %edx

33
test/CodeGen/X86/movmsk-cmp.ll
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@ -86,11 +86,8 @@ define i1 @allones_v32i8_sign(<32 x i8> %arg) {
;
; AVX1-LABEL: allones_v32i8_sign:
; AVX1: # %bb.0:
; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm2
; AVX1-NEXT: vpmovmskb %xmm2, %eax
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %ecx
; AVX1-NEXT: shll $16, %ecx
; AVX1-NEXT: orl %eax, %ecx
@ -140,11 +137,8 @@ define i1 @allzeros_v32i8_sign(<32 x i8> %arg) {
;
; AVX1-LABEL: allzeros_v32i8_sign:
; AVX1: # %bb.0:
; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm2
; AVX1-NEXT: vpmovmskb %xmm2, %eax
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %ecx
; AVX1-NEXT: shll $16, %ecx
; AVX1-NEXT: orl %eax, %ecx
@ -200,18 +194,13 @@ define i1 @allones_v64i8_sign(<64 x i8> %arg) {
;
; AVX1-LABEL: allones_v64i8_sign:
; AVX1: # %bb.0:
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm2, %xmm3
; AVX1-NEXT: vpmovmskb %xmm3, %eax
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm2, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %ecx
; AVX1-NEXT: shll $16, %ecx
; AVX1-NEXT: orl %eax, %ecx
; AVX1-NEXT: vpcmpgtb %xmm1, %xmm2, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: vpmovmskb %xmm1, %eax
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm0
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm2, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %edx
; AVX1-NEXT: shll $16, %edx
; AVX1-NEXT: orl %eax, %edx
@ -275,18 +264,13 @@ define i1 @allzeros_v64i8_sign(<64 x i8> %arg) {
;
; AVX1-LABEL: allzeros_v64i8_sign:
; AVX1: # %bb.0:
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm2, %xmm3
; AVX1-NEXT: vpmovmskb %xmm3, %eax
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm2, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %ecx
; AVX1-NEXT: shll $16, %ecx
; AVX1-NEXT: orl %eax, %ecx
; AVX1-NEXT: vpcmpgtb %xmm1, %xmm2, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: vpmovmskb %xmm1, %eax
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm0
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm2, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %edx
; AVX1-NEXT: shll $16, %edx
; AVX1-NEXT: orl %eax, %edx
@ -4756,11 +4740,8 @@ define i32 @movmskb256(<32 x i8> %x) {
;
; AVX1-LABEL: movmskb256:
; AVX1: # %bb.0:
; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm2
; AVX1-NEXT: vpmovmskb %xmm2, %ecx
; AVX1-NEXT: vpmovmskb %xmm0, %ecx
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: shll $16, %eax
; AVX1-NEXT: orl %ecx, %eax