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[X86] Make foldLogicOfSetCCs work better for vectors pre legal types/operations

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Summary:
There's a check in the code to only check getSetCCResultType after LegalOperations or if the type is MVT::i1. But the i1 check is only allowing scalar types through. I think it should check that the scalar type is MVT::i1 so that it will work for vectors.

The changed test already does this combine with AVX512VL where getSetCCResultType returns vXi1. But with avx512f and no VLX getSetCCResultType returns a type matching the width of the input type.

Reviewers: spatel, RKSimon

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D42619

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323631 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2018-01-29 07:52:55 +00:00
parent 674f4d7428
commit 175e3ee84d
2 changed files with 2 additions and 4 deletions
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2
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -3525,7 +3525,7 @@ SDValue DAGCombiner::foldLogicOfSetCCs(bool IsAnd, SDValue N0, SDValue N1,
// operations on the left and right operands, so those types must match.
EVT VT = N0.getValueType();
EVT OpVT = LL.getValueType();
if (LegalOperations || VT != MVT::i1)
if (LegalOperations || VT.getScalarType() != MVT::i1)
if (VT != getSetCCResultType(OpVT))
return SDValue();
if (OpVT != RL.getValueType())

4
test/CodeGen/X86/avx512vl-vec-cmp.ll
View File

@ -1132,10 +1132,8 @@ define <8 x i32> @testnm_and(<8 x i32> %a, <8 x i32> %b, <8 x i32> %x, <8 x i32>
; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: def %ymm3 killed %ymm3 def %zmm3
; NoVLX-NEXT: # kill: def %ymm2 killed %ymm2 def %zmm2
; NoVLX-NEXT: # kill: def %ymm1 killed %ymm1 def %zmm1
; NoVLX-NEXT: # kill: def %ymm0 killed %ymm0 def %zmm0
; NoVLX-NEXT: vpor %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vptestnmd %zmm0, %zmm0, %k1
; NoVLX-NEXT: vptestnmd %zmm1, %zmm1, %k1 {%k1}
; NoVLX-NEXT: vpblendmd %zmm2, %zmm3, %zmm0 {%k1}
; NoVLX-NEXT: # kill: def %ymm0 killed %ymm0 killed %zmm0
; NoVLX-NEXT: retq