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Uniformize the way these options are printed. Requested by

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Russell Wallace.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96580 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan Sands 2010-02-18 14:37:52 +00:00
parent 1aecd15bd1
commit 18619b2aeb
5 changed files with 6 additions and 6 deletions
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4
docs/CommandGuide/lli.pod
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@ -170,7 +170,7 @@ Instruction schedulers available (before register allocation):
=item B<-regalloc>=I<allocator> =item B<-regalloc>=I<allocator>
Register allocator to use: (default = linearscan) Register allocator to use (default=linearscan)
=bigblock: Big-block register allocator =bigblock: Big-block register allocator
=linearscan: linear scan register allocator =local - local register allocator =linearscan: linear scan register allocator =local - local register allocator
@ -186,7 +186,7 @@ Choose relocation model from:
=item B<-spiller> =item B<-spiller>
Spiller to use: (default: local) Spiller to use (default=local)
=simple: simple spiller =simple: simple spiller
=local: local spiller =local: local spiller

2
docs/WritingAnLLVMPass.html
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@ -1630,7 +1630,7 @@ form; </p>
<div class="doc_code"><pre> <div class="doc_code"><pre>
$ llc -help $ llc -help
... ...
-regalloc - Register allocator to use: (default = linearscan) -regalloc - Register allocator to use (default=linearscan)
=linearscan - linear scan register allocator =linearscan - linear scan register allocator
=local - local register allocator =local - local register allocator
=simple - simple register allocator =simple - simple register allocator

2
lib/CodeGen/Passes.cpp
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@ -34,7 +34,7 @@ static cl::opt<RegisterRegAlloc::FunctionPassCtor, false,
RegisterPassParser<RegisterRegAlloc> > RegisterPassParser<RegisterRegAlloc> >
RegAlloc("regalloc", RegAlloc("regalloc",
cl::init(&createLinearScanRegisterAllocator), cl::init(&createLinearScanRegisterAllocator),
cl::desc("Register allocator to use: (default = linearscan)")); cl::desc("Register allocator to use (default=linearscan)"));
//===---------------------------------------------------------------------===// //===---------------------------------------------------------------------===//

2
lib/CodeGen/VirtRegRewriter.cpp
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@ -46,7 +46,7 @@ namespace {
static cl::opt<RewriterName> static cl::opt<RewriterName>
RewriterOpt("rewriter", RewriterOpt("rewriter",
cl::desc("Rewriter to use: (default: local)"), cl::desc("Rewriter to use (default=local)"),
cl::Prefix, cl::Prefix,
cl::values(clEnumVal(local, "local rewriter"), cl::values(clEnumVal(local, "local rewriter"),
clEnumVal(trivial, "trivial rewriter"), clEnumVal(trivial, "trivial rewriter"),

2
tools/llvmc/example/mcc16/plugins/PIC16Base/PIC16Base.td
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@ -56,7 +56,7 @@ def OptionList : OptionList<[
// (parameter_option "pre-RA-sched", // (parameter_option "pre-RA-sched",
// (help "Example of an option that is passed to llc")), // (help "Example of an option that is passed to llc")),
(parameter_option "regalloc", (parameter_option "regalloc",
(help "Register allocator to use.(possible values: simple, linearscan, pbqp, local. default = linearscan)")), (help "Register allocator to use (possible values: simple, linearscan, pbqp, local; default=linearscan)")),
(prefix_list_option "Wa,", (comma_separated), (prefix_list_option "Wa,", (comma_separated),
(help "Pass options to assembler (Run 'gpasm -help' for assembler options)")), (help "Pass options to assembler (Run 'gpasm -help' for assembler options)")),
(prefix_list_option "Wl,", (comma_separated), (prefix_list_option "Wl,", (comma_separated),