RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2024-12-04 01:42:09 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

For t2BFI, both Inst{26} and Inst{5} "should" be 0.

Browse Source 
Ref: I.1 Instruction encoding diagrams and pseudocode


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129552 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Johnny Chen 2011-04-15 00:35:08 +00:00
parent 4babeeeeed
commit 188ce9c78b
1 changed files with 4 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/Target/ARM/ARMInstrThumb2.td
View File

@ -2166,9 +2166,11 @@ let Constraints = "$src = $Rd" in {
[(set rGPR:$Rd, (ARMbfi rGPR:$src, rGPR:$Rn,
bf_inv_mask_imm:$imm))]> {
let Inst{31-27} = 0b11110;
let Inst{26} = 0; // should be 0.
let Inst{25} = 1;
let Inst{24-20} = 0b10110;
let Inst{15} = 0;
let Inst{5} = 0; // should be 0.
bits<10> imm;
let msb{4-0} = imm{9-5};
@ -2183,9 +2185,11 @@ let Constraints = "$src = $Rd" in {
IIC_iBITi, "bfi", "\t$Rd, $Rn, $lsbit, $width",
[]> {
let Inst{31-27} = 0b11110;
let Inst{26} = 0; // should be 0.
let Inst{25} = 1;
let Inst{24-20} = 0b10110;
let Inst{15} = 0;
let Inst{5} = 0; // should be 0.
bits<5> lsbit;
bits<5> width;