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Add v16i16 and v32i8 store patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137166 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -4063,10 +4063,18 @@ let Predicates = [HasAVX] in {
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(VMOVAPSYmr addr:$dst, VR256:$src)>;
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def : Pat<(alignedstore (v8i32 VR256:$src), addr:$dst),
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(VMOVAPSYmr addr:$dst, VR256:$src)>;
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def : Pat<(alignedstore (v16i16 VR256:$src), addr:$dst),
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(VMOVAPSYmr addr:$dst, VR256:$src)>;
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def : Pat<(alignedstore (v32i8 VR256:$src), addr:$dst),
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(VMOVAPSYmr addr:$dst, VR256:$src)>;
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def : Pat<(store (v4i64 VR256:$src), addr:$dst),
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(VMOVUPSYmr addr:$dst, VR256:$src)>;
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def : Pat<(store (v8i32 VR256:$src), addr:$dst),
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(VMOVUPSYmr addr:$dst, VR256:$src)>;
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def : Pat<(store (v16i16 VR256:$src), addr:$dst),
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(VMOVUPSYmr addr:$dst, VR256:$src)>;
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def : Pat<(store (v32i8 VR256:$src), addr:$dst),
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(VMOVUPSYmr addr:$dst, VR256:$src)>;
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}
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//===----------------------------------------------------------------------===//
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@ -40,3 +40,27 @@ define <4 x double> @mov01(<4 x double> %v, double * %ptr) nounwind {
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ret <4 x double> %i0
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}
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; CHECK: vmovaps %ymm
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define void @storev16i16(<16 x i16> %a) nounwind {
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store <16 x i16> %a, <16 x i16>* undef, align 32
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unreachable
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}
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; CHECK: vmovups %ymm
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define void @storev16i16_01(<16 x i16> %a) nounwind {
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store <16 x i16> %a, <16 x i16>* undef, align 4
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unreachable
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}
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; CHECK: vmovaps %ymm
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define void @storev32i8(<32 x i8> %a) nounwind {
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store <32 x i8> %a, <32 x i8>* undef, align 32
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unreachable
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}
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; CHECK: vmovups %ymm
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define void @storev32i8_01(<32 x i8> %a) nounwind {
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store <32 x i8> %a, <32 x i8>* undef, align 4
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unreachable
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}
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