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Fix some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68404 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -211,7 +211,7 @@ ARMInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
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break;
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}
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// Try spliting an indexed load / store to a un-indexed one plus an add/sub
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// Try splitting an indexed load/store to an un-indexed one plus an add/sub
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// operation.
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unsigned MemOpc = getUnindexedOpcode(MI->getOpcode());
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if (MemOpc == 0)
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@ -401,8 +401,8 @@ bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
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return false;
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}
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// Likewise if it ends with a branch table followed by an unconditional branch.
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// The branch folder can create these, and we must get rid of them for
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// ...likewise if it ends with a branch table followed by an unconditional
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// branch. The branch folder can create these, and we must get rid of them for
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// correctness of Thumb constant islands.
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if ((SecondLastOpc == ARM::BR_JTr || SecondLastOpc==ARM::BR_JTm ||
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SecondLastOpc == ARM::BR_JTadd || SecondLastOpc==ARM::tBR_JTr) &&
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@ -692,7 +692,7 @@ MachineInstr *ARMInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
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default: break;
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case ARM::MOVr: {
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if (MI->getOperand(4).getReg() == ARM::CPSR)
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// If it is updating CPSR, then it cannot be foled.
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// If it is updating CPSR, then it cannot be folded.
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break;
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unsigned Pred = MI->getOperand(2).getImm();
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unsigned PredReg = MI->getOperand(3).getReg();
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@ -781,7 +781,7 @@ bool ARMInstrInfo::canFoldMemoryOperand(const MachineInstr *MI,
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switch (Opc) {
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default: break;
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case ARM::MOVr:
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// If it is updating CPSR, then it cannot be foled.
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// If it is updating CPSR, then it cannot be folded.
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return MI->getOperand(4).getReg() != ARM::CPSR;
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case ARM::tMOVr: {
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if (OpNum == 0) { // move -> store
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