Fix 80-column violations

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42823 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2007-10-10 05:45:59 +00:00
parent 6eaeff29b8
commit 1c08eba3fb

View File

@ -392,22 +392,22 @@ public:
return get(RegNo).Name; return get(RegNo).Name;
} }
/// getNumRegs - Return the number of registers this target has /// getNumRegs - Return the number of registers this target has (useful for
/// (useful for sizing arrays holding per register information) /// sizing arrays holding per register information)
unsigned getNumRegs() const { unsigned getNumRegs() const {
return NumRegs; return NumRegs;
} }
/// areAliases - Returns true if the two registers alias each other, /// areAliases - Returns true if the two registers alias each other, false
/// false otherwise /// otherwise
bool areAliases(unsigned regA, unsigned regB) const { bool areAliases(unsigned regA, unsigned regB) const {
for (const unsigned *Alias = getAliasSet(regA); *Alias; ++Alias) for (const unsigned *Alias = getAliasSet(regA); *Alias; ++Alias)
if (*Alias == regB) return true; if (*Alias == regB) return true;
return false; return false;
} }
/// regsOverlap - Returns true if the two registers are equal or alias /// regsOverlap - Returns true if the two registers are equal or alias each
/// each other. The registers may be virtual register. /// other. The registers may be virtual register.
bool regsOverlap(unsigned regA, unsigned regB) const { bool regsOverlap(unsigned regA, unsigned regB) const {
if (regA == regB) if (regA == regB)
return true; return true;
@ -447,9 +447,9 @@ public:
const MachineFunction *MF) const =0; const MachineFunction *MF) const =0;
/// getReservedRegs - Returns a bitset indexed by physical register number /// getReservedRegs - Returns a bitset indexed by physical register number
/// indicating if a register is a special register that has particular uses and /// indicating if a register is a special register that has particular uses
/// should be considered unavailable at all times, e.g. SP, RA. This is used by /// and should be considered unavailable at all times, e.g. SP, RA. This is
/// register scavenger to determine what registers are free. /// used by register scavenger to determine what registers are free.
virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0; virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0;
/// getSubReg - Returns the physical register number of sub-register "Index" /// getSubReg - Returns the physical register number of sub-register "Index"
@ -482,10 +482,10 @@ public:
// immediates and memory. FIXME: Move these to TargetInstrInfo.h. // immediates and memory. FIXME: Move these to TargetInstrInfo.h.
// //
/// spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved /// spillCalleeSavedRegisters - Issues instruction(s) to spill all callee
/// registers and returns true if it isn't possible / profitable to do so by /// saved registers and returns true if it isn't possible / profitable to do
/// issuing a series of store instructions via storeRegToStackSlot(). Returns /// so by issuing a series of store instructions via
/// false otherwise. /// storeRegToStackSlot(). Returns false otherwise.
virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, MachineBasicBlock::iterator MI,
const std::vector<CalleeSavedInfo> &CSI) const { const std::vector<CalleeSavedInfo> &CSI) const {
@ -543,12 +543,11 @@ public:
unsigned DestReg, unsigned DestReg,
const MachineInstr *Orig) const = 0; const MachineInstr *Orig) const = 0;
/// foldMemoryOperand - Attempt to fold a load or store of the /// foldMemoryOperand - Attempt to fold a load or store of the specified stack
/// specified stack slot into the specified machine instruction for /// slot into the specified machine instruction for the specified operand. If
/// the specified operand. If this is possible, a new instruction /// this is possible, a new instruction is returned with the specified operand
/// is returned with the specified operand folded, otherwise NULL is /// folded, otherwise NULL is returned. The client is responsible for removing
/// returned. The client is responsible for removing the old /// the old instruction and adding the new one in the instruction stream
/// instruction and adding the new one in the instruction stream
virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
unsigned OpNum, unsigned OpNum,
int FrameIndex) const { int FrameIndex) const {
@ -564,12 +563,12 @@ public:
return 0; return 0;
} }
/// unfoldMemoryOperand - Separate a single instruction which folded a load or a /// unfoldMemoryOperand - Separate a single instruction which folded a load or
/// a store or a load and a store into two or more instruction. If this is /// a a store or a load and a store into two or more instruction. If this is
/// possible, returns true as well as the new instructions by reference. /// possible, returns true as well as the new instructions by reference.
virtual bool unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI, virtual bool unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
SSARegMap *RegMap, SSARegMap *RegMap,
SmallVector<MachineInstr*, 4> &NewMIs) const { SmallVector<MachineInstr*, 4> &NewMIs) const{
return false; return false;
} }
@ -578,21 +577,22 @@ public:
return false; return false;
} }
/// targetHandlesStackFrameRounding - Returns true if the target is responsible /// targetHandlesStackFrameRounding - Returns true if the target is
/// for rounding up the stack frame (probably at emitPrologue time). /// responsible for rounding up the stack frame (probably at emitPrologue
/// time).
virtual bool targetHandlesStackFrameRounding() const { virtual bool targetHandlesStackFrameRounding() const {
return false; return false;
} }
/// requiresRegisterScavenging - returns true if the target requires (and /// requiresRegisterScavenging - returns true if the target requires (and can
/// can make use of) the register scavenger. /// make use of) the register scavenger.
virtual bool requiresRegisterScavenging(const MachineFunction &MF) const { virtual bool requiresRegisterScavenging(const MachineFunction &MF) const {
return false; return false;
} }
/// hasFP - Return true if the specified function should have a dedicated frame /// hasFP - Return true if the specified function should have a dedicated
/// pointer register. For most targets this is true only if the function has /// frame pointer register. For most targets this is true only if the function
/// variable sized allocas or if frame pointer elimination is disabled. /// has variable sized allocas or if frame pointer elimination is disabled.
virtual bool hasFP(const MachineFunction &MF) const = 0; virtual bool hasFP(const MachineFunction &MF) const = 0;
// hasReservedCallFrame - Under normal circumstances, when a frame pointer is // hasReservedCallFrame - Under normal circumstances, when a frame pointer is