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Add test case for D46505 . NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333341 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -382,3 +382,65 @@ entry:
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store i64 %b, i64* %a
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ret void
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}
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define i32 @inc_not(i32 %a) {
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; X32-LABEL: inc_not:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: notl %eax
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; X32-NEXT: incl %eax
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; X32-NEXT: retl
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;
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; X64-LINUX-LABEL: inc_not:
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; X64-LINUX: # %bb.0:
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; X64-LINUX-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-LINUX-NEXT: notl %edi
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; X64-LINUX-NEXT: leal 1(%rdi), %eax
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; X64-LINUX-NEXT: retq
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;
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; X64-WIN32-LABEL: inc_not:
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; X64-WIN32: # %bb.0:
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; X64-WIN32-NEXT: # kill: def $ecx killed $ecx def $rcx
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; X64-WIN32-NEXT: notl %ecx
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; X64-WIN32-NEXT: leal 1(%rcx), %eax
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; X64-WIN32-NEXT: retq
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%nota = xor i32 %a, -1
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%r = add i32 %nota, 1
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ret i32 %r
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}
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define void @uaddo1_not(i32 %a, i32* %p0, i1* %p1) {
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; X32-LABEL: uaddo1_not:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X32-NEXT: notl %edx
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; X32-NEXT: addl $1, %edx
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; X32-NEXT: movl %edx, (%ecx)
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; X32-NEXT: setb (%eax)
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; X32-NEXT: retl
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;
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; X64-LINUX-LABEL: uaddo1_not:
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; X64-LINUX: # %bb.0:
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; X64-LINUX-NEXT: notl %edi
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; X64-LINUX-NEXT: addl $1, %edi
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; X64-LINUX-NEXT: movl %edi, (%rsi)
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; X64-LINUX-NEXT: setb (%rdx)
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; X64-LINUX-NEXT: retq
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;
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; X64-WIN32-LABEL: uaddo1_not:
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; X64-WIN32: # %bb.0:
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; X64-WIN32-NEXT: notl %ecx
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; X64-WIN32-NEXT: addl $1, %ecx
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; X64-WIN32-NEXT: movl %ecx, (%rdx)
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; X64-WIN32-NEXT: setb (%r8)
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; X64-WIN32-NEXT: retq
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%nota = xor i32 %a, -1
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%uaddo = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %nota, i32 1)
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%r0 = extractvalue {i32, i1} %uaddo, 0
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%r1 = extractvalue {i32, i1} %uaddo, 1
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store i32 %r0, i32* %p0
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store i1 %r1, i1* %p1
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ret void
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}
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@ -317,3 +317,18 @@ entry:
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%35 = insertvalue %S undef, [4 x i64] %34, 0
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ret %S %35
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}
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define i128 @addcarry1_not(i128 %n) {
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; CHECK-LABEL: addcarry1_not:
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; CHECK: # %bb.0:
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; CHECK-NEXT: notq %rsi
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; CHECK-NEXT: notq %rdi
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; CHECK-NEXT: addq $1, %rdi
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; CHECK-NEXT: adcq $0, %rsi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: movq %rsi, %rdx
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; CHECK-NEXT: retq
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%1 = xor i128 %n, -1
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%2 = add i128 %1, 1
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ret i128 %2
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}
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