[SimplifyCFG] Add a workaround to fix PR30188

We're sinking stores, which is a good thing, but in the process creating selects for the store address operand, which SROA/Mem2Reg can't look through, which caused serious regressions.

The real fix is in SROA, which I'll be looking into.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280219 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Transforms/Utils/SimplifyCFG.cpp

@@ -1424,6 +1424,16 @@ static bool canSinkInstructions(
         // FIXME: if the call was *already* indirect, we should do this.
         return false;
       }
+      // Because SROA can't handle speculating stores of selects, try not
+      // to sink stores of allocas when we'd have to create a PHI for the
+      // address operand.
+      // FIXME: This is a workaround for a deficiency in SROA - see
+      // https://llvm.org/bugs/show_bug.cgi?id=30188
+      if (OI == 1 && isa<StoreInst>(I0) &&
+          any_of(Insts, [](const Instruction *I) {
+            return isa<AllocaInst>(I->getOperand(1));
+          }))
+        return false;
       for (auto *I : Insts)
         PHIOperands[I].push_back(I->getOperand(OI));
     }

test/Transforms/SimplifyCFG/sink-common-code.ll

@@ -537,6 +537,29 @@ if.end:
 ; CHECK-DAG: [ %cmp3, %if.then3 ]
 ; CHECK-NEXT: zext i1 %[[x]] to i8
 
+define i32 @test_pr30188(i1 zeroext %flag, i32 %x) {
+entry:
+  %y = alloca i32
+  %z = alloca i32
+  br i1 %flag, label %if.then, label %if.else
+
+if.then:
+  store i32 %x, i32* %y
+  br label %if.end
+
+if.else:
+  store i32 %x, i32* %z
+  br label %if.end
+
+if.end:
+  ret i32 1
+}
+
+; CHECK-LABEL: test_pr30188
+; CHECK-NOT: select
+; CHECK: store
+; CHECK: store
+
 ; CHECK: !0 = !{!1, !1, i64 0}
 ; CHECK: !1 = !{!"float", !2}
 ; CHECK: !2 = !{!"an example type tree"}