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Remove templates from CostTableLookup functions. All instantiations had the same type.

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This also lets us remove the versions of the functions that took a statically sized array as we can rely on ArrayRef implicit conversion now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251490 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2015-10-28 04:02:12 +00:00
parent e60bc4e8b8
commit 1d1d5f6090
4 changed files with 47 additions and 76 deletions
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41
include/llvm/Target/CostTable.h
View File

@ -16,23 +16,22 @@
#define LLVM_TARGET_COSTTABLE_H_
#include "llvm/ADT/ArrayRef.h"
#include "llvm/CodeGen/MachineValueType.h"
namespace llvm {
/// Cost Table Entry
template <class TypeTy>
struct CostTblEntry {
int ISD;
TypeTy Type;
MVT::SimpleValueType Type;
unsigned Cost;
};
/// Find in cost table, TypeTy must be comparable to CompareTy by ==
template <class TypeTy, class CompareTy>
const CostTblEntry<TypeTy> *CostTableLookup(ArrayRef<CostTblEntry<TypeTy>> Tbl,
int ISD, CompareTy Ty) {
inline const CostTblEntry *CostTableLookup(ArrayRef<CostTblEntry> Tbl,
int ISD, MVT Ty) {
auto I = std::find_if(Tbl.begin(), Tbl.end(),
[=](const CostTblEntry<TypeTy> &Entry) {
[=](const CostTblEntry &Entry) {
return ISD == Entry.ISD && Ty == Entry.Type; });
if (I != Tbl.end())
return I;
@ -41,30 +40,21 @@ const CostTblEntry<TypeTy> *CostTableLookup(ArrayRef<CostTblEntry<TypeTy>> Tbl,
return nullptr;
}
/// Find in cost table, TypeTy must be comparable to CompareTy by ==
template <class TypeTy, class CompareTy, unsigned N>
const CostTblEntry<TypeTy> *CostTableLookup(const CostTblEntry<TypeTy>(&Tbl)[N],
int ISD, CompareTy Ty) {
return CostTableLookup(makeArrayRef(Tbl), ISD, Ty);
}
/// Type Conversion Cost Table
template <class TypeTy>
struct TypeConversionCostTblEntry {
int ISD;
TypeTy Dst;
TypeTy Src;
MVT::SimpleValueType Dst;
MVT::SimpleValueType Src;
unsigned Cost;
};
/// Find in type conversion cost table, TypeTy must be comparable to CompareTy
/// by ==
template <class TypeTy, class CompareTy>
const TypeConversionCostTblEntry<TypeTy> *
ConvertCostTableLookup(ArrayRef<TypeConversionCostTblEntry<TypeTy>> Tbl,
int ISD, CompareTy Dst, CompareTy Src) {
inline const TypeConversionCostTblEntry *
ConvertCostTableLookup(ArrayRef<TypeConversionCostTblEntry> Tbl,
int ISD, MVT Dst, MVT Src) {
auto I = std::find_if(Tbl.begin(), Tbl.end(),
[=](const TypeConversionCostTblEntry<TypeTy> &Entry) {
[=](const TypeConversionCostTblEntry &Entry) {
return ISD == Entry.ISD && Src == Entry.Src &&
Dst == Entry.Dst;
});
@ -75,15 +65,6 @@ ConvertCostTableLookup(ArrayRef<TypeConversionCostTblEntry<TypeTy>> Tbl,
return nullptr;
}
/// Find in type conversion cost table, TypeTy must be comparable to CompareTy
/// by ==
template <class TypeTy, class CompareTy, unsigned N>
const TypeConversionCostTblEntry<TypeTy> *
ConvertCostTableLookup(const TypeConversionCostTblEntry<TypeTy>(&Tbl)[N],
int ISD, CompareTy Dst, CompareTy Src) {
return ConvertCostTableLookup(makeArrayRef(Tbl), ISD, Dst, Src);
}
} // namespace llvm

4
lib/Target/AArch64/AArch64TargetTransformInfo.cpp
View File

@ -186,7 +186,7 @@ int AArch64TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) {
if (!SrcTy.isSimple() || !DstTy.isSimple())
return BaseT::getCastInstrCost(Opcode, Dst, Src);
static const TypeConversionCostTblEntry<MVT::SimpleValueType>
static const TypeConversionCostTblEntry
ConversionTbl[] = {
{ ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i16, 0 },
{ ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i16, 0 },
@ -385,7 +385,7 @@ int AArch64TTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
if (ValTy->isVectorTy() && ISD == ISD::SELECT) {
// We would need this many instructions to hide the scalarization happening.
const int AmortizationCost = 20;
static const TypeConversionCostTblEntry<MVT::SimpleValueType>
static const TypeConversionCostTblEntry
VectorSelectTbl[] = {
{ ISD::SELECT, MVT::v16i1, MVT::v16i16, 16 },
{ ISD::SELECT, MVT::v8i1, MVT::v8i32, 8 },

23
lib/Target/ARM/ARMTargetTransformInfo.cpp
View File

@ -52,7 +52,7 @@ int ARMTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) {
assert(ISD && "Invalid opcode");
// Single to/from double precision conversions.
static const CostTblEntry<MVT::SimpleValueType> NEONFltDblTbl[] = {
static const CostTblEntry NEONFltDblTbl[] = {
// Vector fptrunc/fpext conversions.
{ ISD::FP_ROUND, MVT::v2f64, 2 },
{ ISD::FP_EXTEND, MVT::v2f32, 2 },
@ -75,8 +75,7 @@ int ARMTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) {
// Some arithmetic, load and store operations have specific instructions
// to cast up/down their types automatically at no extra cost.
// TODO: Get these tables to know at least what the related operations are.
static const TypeConversionCostTblEntry<MVT::SimpleValueType>
NEONVectorConversionTbl[] = {
static const TypeConversionCostTblEntry NEONVectorConversionTbl[] = {
{ ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i16, 0 },
{ ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i16, 0 },
{ ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i32, 1 },
@ -159,8 +158,7 @@ int ARMTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) {
}
// Scalar float to integer conversions.
static const TypeConversionCostTblEntry<MVT::SimpleValueType>
NEONFloatConversionTbl[] = {
static const TypeConversionCostTblEntry NEONFloatConversionTbl[] = {
{ ISD::FP_TO_SINT, MVT::i1, MVT::f32, 2 },
{ ISD::FP_TO_UINT, MVT::i1, MVT::f32, 2 },
{ ISD::FP_TO_SINT, MVT::i1, MVT::f64, 2 },
@ -190,8 +188,7 @@ int ARMTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) {
}
// Scalar integer to float conversions.
static const TypeConversionCostTblEntry<MVT::SimpleValueType>
NEONIntegerConversionTbl[] = {
static const TypeConversionCostTblEntry NEONIntegerConversionTbl[] = {
{ ISD::SINT_TO_FP, MVT::f32, MVT::i1, 2 },
{ ISD::UINT_TO_FP, MVT::f32, MVT::i1, 2 },
{ ISD::SINT_TO_FP, MVT::f64, MVT::i1, 2 },
@ -222,8 +219,7 @@ int ARMTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) {
}
// Scalar integer conversion costs.
static const TypeConversionCostTblEntry<MVT::SimpleValueType>
ARMIntegerConversionTbl[] = {
static const TypeConversionCostTblEntry ARMIntegerConversionTbl[] = {
// i16 -> i64 requires two dependent operations.
{ ISD::SIGN_EXTEND, MVT::i64, MVT::i16, 2 },
@ -277,8 +273,7 @@ int ARMTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy) {
// On NEON a a vector select gets lowered to vbsl.
if (ST->hasNEON() && ValTy->isVectorTy() && ISD == ISD::SELECT) {
// Lowering of some vector selects is currently far from perfect.
static const TypeConversionCostTblEntry<MVT::SimpleValueType>
NEONVectorSelectTbl[] = {
static const TypeConversionCostTblEntry NEONVectorSelectTbl[] = {
{ ISD::SELECT, MVT::v16i1, MVT::v16i16, 2*16 + 1 + 3*1 + 4*1 },
{ ISD::SELECT, MVT::v8i1, MVT::v8i32, 4*8 + 1*3 + 1*4 + 1*2 },
{ ISD::SELECT, MVT::v16i1, MVT::v16i32, 4*16 + 1*6 + 1*8 + 1*4 },
@ -344,7 +339,7 @@ int ARMTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
return BaseT::getShuffleCost(Kind, Tp, Index, SubTp);
if (Kind == TTI::SK_Reverse) {
static const CostTblEntry<MVT::SimpleValueType> NEONShuffleTbl[] = {
static const CostTblEntry NEONShuffleTbl[] = {
// Reverse shuffle cost one instruction if we are shuffling within a
// double word (vrev) or two if we shuffle a quad word (vrev, vext).
{ISD::VECTOR_SHUFFLE, MVT::v2i32, 1},
@ -366,7 +361,7 @@ int ARMTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
return BaseT::getShuffleCost(Kind, Tp, Index, SubTp);
}
if (Kind == TTI::SK_Alternate) {
static const CostTblEntry<MVT::SimpleValueType> NEONAltShuffleTbl[] = {
static const CostTblEntry NEONAltShuffleTbl[] = {
// Alt shuffle cost table for ARM. Cost is the number of instructions
// required to create the shuffled vector.
@ -402,7 +397,7 @@ int ARMTTIImpl::getArithmeticInstrCost(
const unsigned FunctionCallDivCost = 20;
const unsigned ReciprocalDivCost = 10;
static const CostTblEntry<MVT::SimpleValueType> CostTbl[] = {
static const CostTblEntry CostTbl[] = {
// Division.
// These costs are somewhat random. Choose a cost of 20 to indicate that
// vectorizing devision (added function call) is going to be very expensive.

55
lib/Target/X86/X86TargetTransformInfo.cpp
View File

@ -115,8 +115,7 @@ int X86TTIImpl::getArithmeticInstrCost(
return Cost;
}
static const CostTblEntry<MVT::SimpleValueType>
AVX2UniformConstCostTable[] = {
static const CostTblEntry AVX2UniformConstCostTable[] = {
{ ISD::SRA, MVT::v4i64, 4 }, // 2 x psrad + shuffle.
{ ISD::SDIV, MVT::v16i16, 6 }, // vpmulhw sequence
@ -132,7 +131,7 @@ int X86TTIImpl::getArithmeticInstrCost(
return LT.first * Entry->Cost;
}
static const CostTblEntry<MVT::SimpleValueType> AVX512CostTable[] = {
static const CostTblEntry AVX512CostTable[] = {
{ ISD::SHL, MVT::v16i32, 1 },
{ ISD::SRL, MVT::v16i32, 1 },
{ ISD::SRA, MVT::v16i32, 1 },
@ -146,7 +145,7 @@ int X86TTIImpl::getArithmeticInstrCost(
return LT.first * Entry->Cost;
}
static const CostTblEntry<MVT::SimpleValueType> AVX2CostTable[] = {
static const CostTblEntry AVX2CostTable[] = {
// Shifts on v4i64/v8i32 on AVX2 is legal even though we declare to
// customize them to detect the cases where shift amount is a scalar one.
{ ISD::SHL, MVT::v4i32, 1 },
@ -174,7 +173,7 @@ int X86TTIImpl::getArithmeticInstrCost(
return LT.first * Entry->Cost;
}
static const CostTblEntry<MVT::SimpleValueType> XOPCostTable[] = {
static const CostTblEntry XOPCostTable[] = {
// 128bit shifts take 1cy, but right shifts require negation beforehand.
{ ISD::SHL, MVT::v16i8, 1 },
{ ISD::SRL, MVT::v16i8, 2 },
@ -209,7 +208,7 @@ int X86TTIImpl::getArithmeticInstrCost(
return LT.first * Entry->Cost;
}
static const CostTblEntry<MVT::SimpleValueType> AVX2CustomCostTable[] = {
static const CostTblEntry AVX2CustomCostTable[] = {
{ ISD::SHL, MVT::v32i8, 11 }, // vpblendvb sequence.
{ ISD::SHL, MVT::v16i16, 10 }, // extend/vpsrlvd/pack sequence.
@ -239,7 +238,7 @@ int X86TTIImpl::getArithmeticInstrCost(
return LT.first * Entry->Cost;
}
static const CostTblEntry<MVT::SimpleValueType>
static const CostTblEntry
SSE2UniformConstCostTable[] = {
// We don't correctly identify costs of casts because they are marked as
// custom.
@ -310,7 +309,7 @@ int X86TTIImpl::getArithmeticInstrCost(
ISD = ISD::MUL;
}
static const CostTblEntry<MVT::SimpleValueType> SSE2CostTable[] = {
static const CostTblEntry SSE2CostTable[] = {
// We don't correctly identify costs of casts because they are marked as
// custom.
// For some cases, where the shift amount is a scalar we would be able
@ -367,7 +366,7 @@ int X86TTIImpl::getArithmeticInstrCost(
return LT.first * Entry->Cost;
}
static const CostTblEntry<MVT::SimpleValueType> AVX1CostTable[] = {
static const CostTblEntry AVX1CostTable[] = {
// We don't have to scalarize unsupported ops. We can issue two half-sized
// operations and we only need to extract the upper YMM half.
// Two ops + 1 extract + 1 insert = 4.
@ -394,7 +393,7 @@ int X86TTIImpl::getArithmeticInstrCost(
}
// Custom lowering of vectors.
static const CostTblEntry<MVT::SimpleValueType> CustomLowered[] = {
static const CostTblEntry CustomLowered[] = {
// A v2i64/v4i64 and multiply is custom lowered as a series of long
// multiplies(3), shifts(4) and adds(2).
{ ISD::MUL, MVT::v2i64, 9 },
@ -439,7 +438,7 @@ int X86TTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
if (ST->hasAVX2() && LT.second == MVT::v16i16)
return LT.first;
static const CostTblEntry<MVT::SimpleValueType> AVXAltShuffleTbl[] = {
static const CostTblEntry AVXAltShuffleTbl[] = {
{ISD::VECTOR_SHUFFLE, MVT::v4i64, 1}, // vblendpd
{ISD::VECTOR_SHUFFLE, MVT::v4f64, 1}, // vblendpd
@ -460,7 +459,7 @@ int X86TTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
ISD::VECTOR_SHUFFLE, LT.second))
return LT.first * Entry->Cost;
static const CostTblEntry<MVT::SimpleValueType> SSE41AltShuffleTbl[] = {
static const CostTblEntry SSE41AltShuffleTbl[] = {
// These are lowered into movsd.
{ISD::VECTOR_SHUFFLE, MVT::v2i64, 1},
{ISD::VECTOR_SHUFFLE, MVT::v2f64, 1},
@ -483,7 +482,7 @@ int X86TTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
LT.second))
return LT.first * Entry->Cost;
static const CostTblEntry<MVT::SimpleValueType> SSSE3AltShuffleTbl[] = {
static const CostTblEntry SSSE3AltShuffleTbl[] = {
{ISD::VECTOR_SHUFFLE, MVT::v2i64, 1}, // movsd
{ISD::VECTOR_SHUFFLE, MVT::v2f64, 1}, // movsd
@ -501,7 +500,7 @@ int X86TTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
ISD::VECTOR_SHUFFLE, LT.second))
return LT.first * Entry->Cost;
static const CostTblEntry<MVT::SimpleValueType> SSEAltShuffleTbl[] = {
static const CostTblEntry SSEAltShuffleTbl[] = {
{ISD::VECTOR_SHUFFLE, MVT::v2i64, 1}, // movsd
{ISD::VECTOR_SHUFFLE, MVT::v2f64, 1}, // movsd
@ -529,8 +528,7 @@ int X86TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) {
int ISD = TLI->InstructionOpcodeToISD(Opcode);
assert(ISD && "Invalid opcode");
static const TypeConversionCostTblEntry<MVT::SimpleValueType>
AVX512ConversionTbl[] = {
static const TypeConversionCostTblEntry AVX512ConversionTbl[] = {
{ ISD::FP_EXTEND, MVT::v8f64, MVT::v8f32, 1 },
{ ISD::FP_EXTEND, MVT::v8f64, MVT::v16f32, 3 },
{ ISD::FP_ROUND, MVT::v8f32, MVT::v8f64, 1 },
@ -562,8 +560,7 @@ int X86TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) {
{ ISD::SINT_TO_FP, MVT::v8f64, MVT::v8i32, 1 },
};
static const TypeConversionCostTblEntry<MVT::SimpleValueType>
AVX2ConversionTbl[] = {
static const TypeConversionCostTblEntry AVX2ConversionTbl[] = {
{ ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i8, 1 },
{ ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i8, 1 },
{ ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i1, 3 },
@ -594,8 +591,7 @@ int X86TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) {
{ ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i32, 8 },
};
static const TypeConversionCostTblEntry<MVT::SimpleValueType>
AVXConversionTbl[] = {
static const TypeConversionCostTblEntry AVXConversionTbl[] = {
{ ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i8, 4 },
{ ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i8, 4 },
{ ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i1, 7 },
@ -665,8 +661,7 @@ int X86TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) {
{ ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f64, 4*4 },
};
static const TypeConversionCostTblEntry<MVT::SimpleValueType>
SSE2ConvTbl[] = {
static const TypeConversionCostTblEntry SSE2ConvTbl[] = {
// These are somewhat magic numbers justified by looking at the output of
// Intel's IACA, running some kernels and making sure when we take
// legalization into account the throughput will be overestimated.
@ -737,7 +732,7 @@ int X86TTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy) {
int ISD = TLI->InstructionOpcodeToISD(Opcode);
assert(ISD && "Invalid opcode");
static const CostTblEntry<MVT::SimpleValueType> SSE42CostTbl[] = {
static const CostTblEntry SSE42CostTbl[] = {
{ ISD::SETCC, MVT::v2f64, 1 },
{ ISD::SETCC, MVT::v4f32, 1 },
{ ISD::SETCC, MVT::v2i64, 1 },
@ -746,7 +741,7 @@ int X86TTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy) {
{ ISD::SETCC, MVT::v16i8, 1 },
};
static const CostTblEntry<MVT::SimpleValueType> AVX1CostTbl[] = {
static const CostTblEntry AVX1CostTbl[] = {
{ ISD::SETCC, MVT::v4f64, 1 },
{ ISD::SETCC, MVT::v8f32, 1 },
// AVX1 does not support 8-wide integer compare.
@ -756,14 +751,14 @@ int X86TTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy) {
{ ISD::SETCC, MVT::v32i8, 4 },
};
static const CostTblEntry<MVT::SimpleValueType> AVX2CostTbl[] = {
static const CostTblEntry AVX2CostTbl[] = {
{ ISD::SETCC, MVT::v4i64, 1 },
{ ISD::SETCC, MVT::v8i32, 1 },
{ ISD::SETCC, MVT::v16i16, 1 },
{ ISD::SETCC, MVT::v32i8, 1 },
};
static const CostTblEntry<MVT::SimpleValueType> AVX512CostTbl[] = {
static const CostTblEntry AVX512CostTbl[] = {
{ ISD::SETCC, MVT::v8i64, 1 },
{ ISD::SETCC, MVT::v16i32, 1 },
{ ISD::SETCC, MVT::v8f64, 1 },
@ -946,7 +941,7 @@ int X86TTIImpl::getReductionCost(unsigned Opcode, Type *ValTy,
// We use the Intel Architecture Code Analyzer(IACA) to measure the throughput
// and make it as the cost.
static const CostTblEntry<MVT::SimpleValueType> SSE42CostTblPairWise[] = {
static const CostTblEntry SSE42CostTblPairWise[] = {
{ ISD::FADD, MVT::v2f64, 2 },
{ ISD::FADD, MVT::v4f32, 4 },
{ ISD::ADD, MVT::v2i64, 2 }, // The data reported by the IACA tool is "1.6".
@ -954,7 +949,7 @@ int X86TTIImpl::getReductionCost(unsigned Opcode, Type *ValTy,
{ ISD::ADD, MVT::v8i16, 5 },
};
static const CostTblEntry<MVT::SimpleValueType> AVX1CostTblPairWise[] = {
static const CostTblEntry AVX1CostTblPairWise[] = {
{ ISD::FADD, MVT::v4f32, 4 },
{ ISD::FADD, MVT::v4f64, 5 },
{ ISD::FADD, MVT::v8f32, 7 },
@ -965,7 +960,7 @@ int X86TTIImpl::getReductionCost(unsigned Opcode, Type *ValTy,
{ ISD::ADD, MVT::v8i32, 5 },
};
static const CostTblEntry<MVT::SimpleValueType> SSE42CostTblNoPairWise[] = {
static const CostTblEntry SSE42CostTblNoPairWise[] = {
{ ISD::FADD, MVT::v2f64, 2 },
{ ISD::FADD, MVT::v4f32, 4 },
{ ISD::ADD, MVT::v2i64, 2 }, // The data reported by the IACA tool is "1.6".
@ -973,7 +968,7 @@ int X86TTIImpl::getReductionCost(unsigned Opcode, Type *ValTy,
{ ISD::ADD, MVT::v8i16, 4 }, // The data reported by the IACA tool is "4.3".
};
static const CostTblEntry<MVT::SimpleValueType> AVX1CostTblNoPairWise[] = {
static const CostTblEntry AVX1CostTblNoPairWise[] = {
{ ISD::FADD, MVT::v4f32, 3 },
{ ISD::FADD, MVT::v4f64, 3 },
{ ISD::FADD, MVT::v8f32, 4 },