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Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocator.
Remvoe some dead code git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5070 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1,4 +1,4 @@
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//===-- RegAllocSimple.cpp - A simple generic register allocator --- ------===//
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//===-- RegAllocSimple.cpp - A simple generic register allocator ----------===//
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//
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// This file implements a simple register allocator. *Very* simple.
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//
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@ -12,32 +12,6 @@
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#include <iostream>
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#include <set>
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#if 0
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/// PhysRegClassMap - Construct a mapping of physical register numbers to their
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/// register classes.
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///
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/// NOTE: This class will eventually be pulled out to somewhere shared.
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///
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class PhysRegClassMap {
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std::map<unsigned, const TargetRegisterClass*> PhysReg2RegClassMap;
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public:
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PhysRegClassMap(const MRegisterInfo *RI) {
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for (MRegisterInfo::const_iterator I = RI->regclass_begin(),
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E = RI->regclass_end(); I != E; ++I)
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for (unsigned i=0; i < (*I)->getNumRegs(); ++i)
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PhysReg2RegClassMap[(*I)->getRegister(i)] = *I;
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}
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const TargetRegisterClass *operator[](unsigned Reg) {
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assert(PhysReg2RegClassMap[Reg] && "Register is not a known physreg!");
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return PhysReg2RegClassMap[Reg];
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}
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const TargetRegisterClass *get(unsigned Reg) { return operator[](Reg); }
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};
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#endif
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namespace {
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Statistic<> NumSpilled ("ra-simple", "Number of registers spilled");
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Statistic<> NumReloaded("ra-simple", "Number of registers reloaded");
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@ -367,6 +341,6 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
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return true;
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}
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Pass *createSimpleX86RegisterAllocator(TargetMachine &TM) {
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Pass *createSimpleRegisterAllocator(TargetMachine &TM) {
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return new RegAllocSimple(TM);
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}
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